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      1 //===-- X86InstrVMX.td - TSX Instruction Set Extension -----*- tablegen -*-===//
      2 //
      3 //                     The LLVM Compiler Infrastructure
      4 //
      5 // This file is distributed under the University of Illinois Open Source
      6 // License. See LICENSE.TXT for details.
      7 //
      8 //===----------------------------------------------------------------------===//
      9 //
     10 // This file describes the instructions that make up the Intel TSX instruction
     11 // set.
     12 //
     13 //===----------------------------------------------------------------------===//
     14 
     15 //===----------------------------------------------------------------------===//
     16 // TSX instructions
     17 
     18 let usesCustomInserter = 1 in
     19 def XBEGIN : I<0, Pseudo, (outs GR32:$dst), (ins),
     20                "# XBEGIN", [(set GR32:$dst, (int_x86_xbegin))]>,
     21              Requires<[HasRTM]>;
     22 
     23 let isBranch = 1, isTerminator = 1, Defs = [EAX] in
     24 def XBEGIN_4 : Ii32PCRel<0xc7, MRM_F8, (outs), (ins brtarget:$dst),
     25                          "xbegin\t$dst", []>, Requires<[HasRTM]>;
     26 
     27 def XEND : I<0x01, MRM_D5, (outs), (ins),
     28              "xend", [(int_x86_xend)]>, TB, Requires<[HasRTM]>;
     29 
     30 def XABORT : Ii8<0xc6, MRM_F8, (outs), (ins i8imm:$imm),
     31                  "xabort\t$imm",
     32                  [(int_x86_xabort imm:$imm)]>, Requires<[HasRTM]>;
     33