1 ; RUN: llc -march=arm -mcpu=cortex-a8 < %s | FileCheck %s 2 3 ; 171 = 0x000000ab 4 define i64 @f1(i64 %a) { 5 ; CHECK: f1 6 ; CHECK: subs r0, r0, #171 7 ; CHECK: sbc r1, r1, #0 8 %tmp = sub i64 %a, 171 9 ret i64 %tmp 10 } 11 12 ; 66846720 = 0x03fc0000 13 define i64 @f2(i64 %a) { 14 ; CHECK: f2 15 ; CHECK: subs r0, r0, #66846720 16 ; CHECK: sbc r1, r1, #0 17 %tmp = sub i64 %a, 66846720 18 ret i64 %tmp 19 } 20 21 ; 734439407618 = 0x000000ab00000002 22 define i64 @f3(i64 %a) { 23 ; CHECK: f3 24 ; CHECK: subs r0, r0, #2 25 ; CHECK: sbc r1, r1, #171 26 %tmp = sub i64 %a, 734439407618 27 ret i64 %tmp 28 } 29 30 define i32 @f4(i32 %x) { 31 entry: 32 ; CHECK: f4 33 ; CHECK: rsbs 34 %sub = sub i32 1, %x 35 %cmp = icmp ugt i32 %sub, 0 36 %sel = select i1 %cmp, i32 1, i32 %sub 37 ret i32 %sel 38 } 39 40 ; rdar://11726136 41 define i32 @f5(i32 %x) { 42 entry: 43 ; CHECK: f5 44 ; CHECK: movw r1, #65535 45 ; CHECK-NOT: movt 46 ; CHECK-NOT: add 47 ; CHECK: sub r0, r0, r1 48 %sub = add i32 %x, -65535 49 ret i32 %sub 50 } 51
