1 ; RUN: llc -O0 -mtriple=powerpc-unknown-linux-gnu -mattr=+altivec -verify-machineinstrs < %s | FileCheck %s 2 ; RUN: llc -O0 -mtriple=powerpc64-unknown-linux-gnu -mattr=+altivec -verify-machineinstrs < %s | FileCheck %s 3 4 ; This verifies that we generate correct spill/reload code for vector regs. 5 6 define void @addrtaken(i32 %i, <4 x float> %w) nounwind { 7 entry: 8 %i.addr = alloca i32, align 4 9 %w.addr = alloca <4 x float>, align 16 10 store i32 %i, i32* %i.addr, align 4 11 store <4 x float> %w, <4 x float>* %w.addr, align 16 12 call void @foo(i32* %i.addr) 13 ret void 14 } 15 16 ; CHECK: stvx 2, 1, 17 ; CHECK: lvx 2, 1, 18 19 declare void @foo(i32*) 20
