1 // RUN: llvm-tblgen %s | grep ADDPSrr | count 1 2 3 class Instruction<bits<4> opc, string Name> { 4 bits<4> opcode = opc; 5 string name = Name; 6 } 7 8 multiclass basic_r<bits<4> opc> { 9 def rr : Instruction<opc, "rr">; 10 def rm : Instruction<opc, "rm">; 11 } 12 13 multiclass basic_s<bits<4> opc> { 14 defm SS : basic_r<opc>; 15 defm SD : basic_r<opc>; 16 } 17 18 multiclass basic_p<bits<4> opc> { 19 defm PS : basic_r<opc>; 20 defm PD : basic_r<opc>; 21 } 22 23 defm ADD : basic_s<0xf>, basic_p<0xf>; 24 defm SUB : basic_s<0xe>, basic_p<0xe>; 25
