1 2 This file records register use conventions and info for the 4 3 supported platforms (since it is ABI dependent). This is so as to 4 avoid having to endlessly re-look up this info in ABI documents. 5 6 ----------------------- 7 8 x86-linux 9 ~~~~~~~~~ 10 11 Reg Callee Arg 12 Name Saves? Reg? Comment Vex-uses? 13 -------------------------------------------------------------- 14 eax n n int[31:0] retreg y 15 ebx y n y 16 ecx n n y 17 edx n n int[63:32] retreg y 18 esi y n y 19 edi y n y 20 ebp y n & guest state 21 esp reserved n/a n/a 22 eflags n n/a y 23 st0 n ? n fp retreg y 24 st1-7 n ? n y 25 xmm0-7 n ? n y 26 27 In the case where arguments are passed in registers, the arg1,2,3 28 registers are EAX, EDX, and ECX respectively. 29 30 31 amd64-linux 32 ~~~~~~~~~~~ 33 34 Reg Callee Arg 35 Name Saves? Reg? Comment Vex-uses? 36 ------------------------------------------------------------------- 37 rax n n int[63:0] retreg 38 rbx y n y 39 rcx n int#4 40 rdx n int#3 int[127:64] retreg 41 rsi n int#2 y 42 rdi n int#1 y 43 rbp y n & guest state 44 rsp reserved n/a n/a 45 r8 n int#5 y 46 r9 n int#6 y 47 r10 n ? 48 r11 n jmp temporary 49 r12-15 y y 50 eflags n n/a y 51 st0-7 n n long double retreg y 52 xmm0 n fp#1 fp retreg 53 xmm1 n fp#2 fp-high retreg 54 xmm2-7 n fp#3-8 y (3-7) 55 xmm8-15 n y (8-12) 56 57 58 ppc32-linux 59 ~~~~~~~~~~~ 60 61 Reg Callee Arg 62 Name Saves? Reg? Comment Vex-uses? 63 ------------------------------------------------------------------- 64 r0 n n sometimes RAZ 65 r1 y n stack pointer 66 r2 n n 67 r3 n int#1 int[31:0] retreg y 68 r4 n int#2 also int retreg y 69 r5 n int#3 y 70 r6 n int#4 y 71 r7 n int#5 y 72 r8 n int#6 y 73 r9 n int#7 y 74 r10 n int#8 y 75 r11 n y 76 r12 n y 77 r13 ? 78 r14-28 y y 79 r29 y reserved for dispatcher 80 r30 y altivec spill temporary 81 r31 y & guest state 82 f0 n 83 f1 n fp#1 fp retreg 84 f2-8 n fp#2-8 85 f9-13 n 86 f14-31 y y (14-21) 87 v0-v19 ? 88 v20-31 y y (20-27,29) 89 cr0-7 90 lr y return address 91 ctr n 92 xer n 93 fpscr 94 95 96 ppc64-linux 97 ~~~~~~~~~~~ 98 TBD 99 100 101 arm-linux 102 ~~~~~~~~~ 103 104 Reg Callee Arg 105 Name Saves? Reg? Comment Vex-uses? 106 -------------------------------------------------------------- 107 r0 int#1 int[31:0] retreg? avail 108 r1 int#2 int[63:32] retreg? avail 109 r2 int#3 avail 110 r3 int#4 avail 111 r4 y avail 112 r5 y avail 113 r6 y avail 114 r7 y avail 115 r8 y GSP 116 r9 y (but only on Linux; not in general) avail 117 r10 y avail 118 r11 y avail 119 r12 possibly used by linker? unavail 120 r13(sp) unavail 121 r14(lr) unavail 122 r15(pc) unavail 123 124 VFP: d8-d15 are callee-saved 125 r12 (IP) is probably available for use as a caller-saved 126 register; but instead we use it as an intermediate for 127 holding the address for F32/F64 spills, since the VFP load/store 128 insns have reg+offset forms for offsets only up to 1020, which 129 often isn't enough. 130 131 132 s390x-linux 133 ~~~~~~~~~~~ 134 135 Reg Callee Arg 136 Name Saves? Reg? Comment Vex-uses? 137 -------------------------------------------------------------- 138 r0 n see below unavail 139 r1 n avail 140 r2 n int#1 return value avail 141 r3 n int#2 avail 142 r4 n int#3 avail 143 r5 n int#4 avail 144 r6 y int#5 avail 145 r7 y avail 146 r8 y avail 147 r9 y avail 148 r10 y see below avail 149 r11 y see below avail 150 r12 y unavail VG_(dispatch_ctr) 151 r13 y unavail gsp 152 r14(lr) n unavail lr 153 r15(sp) y unavail sp 154 155 f0 n return value avail 156 f1-f7 n avail 157 f8-f11 y avail 158 f12-f15 y see below avail 159 160 When r0 is used as a base or index register its contents is 161 ignored and the value 0 is used instead. This is the reason 162 why VEX cannot use it. 163 164 r10, r11 as well as f12-f15 are used as real regs during insn 165 selection when register pairs are required. 166 167 168 ppc32-aix5 169 ~~~~~~~~~~ 170 171 Reg Callee Arg 172 Name Saves? Reg? Comment Vex-uses? 173 ------------------------------------------------------------------- 174 r0 n n sometimes RAZ 175 r1 y n stack pointer 176 r2 n n TOC pointer 177 r3 n int#1 int[31:0] retreg y 178 r4 n int#2 also int retreg y 179 r5 n int#3 y 180 r6 n int#4 y 181 r7 n int#5 y 182 r8 n int#6 y 183 r9 n int#7 y 184 r10 n int#8 y 185 r11 n "env pointer?!" y 186 r12 n "exn handling" y 187 r13 ? "reserved in 64-bit env" 188 r14-28 y y 189 r29 y reserved for dispatcher 190 r30 y altivec spill temporary 191 r31 y & guest state 192 f0 n 193 f1 n fp#1 fp retreg 194 f2-13 n fp#2-13 195 f14-31 y y (14-21) 196 v0-v19 ? 197 v20-31 y y (20-27,29) 198 cr0-7 199 lr y return address 200 ctr n 201 xer n 202 fpscr 203
