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      1 #ifndef __SOUND_AD1848_H
      2 #define __SOUND_AD1848_H
      3 
      4 /*
      5  *  Copyright (c) by Jaroslav Kysela <perex (at) perex.cz>
      6  *  Definitions for AD1847/AD1848/CS4248 chips
      7  *
      8  *
      9  *   This program is free software; you can redistribute it and/or modify
     10  *   it under the terms of the GNU General Public License as published by
     11  *   the Free Software Foundation; either version 2 of the License, or
     12  *   (at your option) any later version.
     13  *
     14  *   This program is distributed in the hope that it will be useful,
     15  *   but WITHOUT ANY WARRANTY; without even the implied warranty of
     16  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
     17  *   GNU General Public License for more details.
     18  *
     19  *   You should have received a copy of the GNU General Public License
     20  *   along with this program; if not, write to the Free Software
     21  *   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
     22  *
     23  */
     24 
     25 #include "pcm.h"
     26 #include <linux/interrupt.h>
     27 
     28 /* IO ports */
     29 
     30 #define AD1848P( chip, x ) ( (chip) -> port + c_d_c_AD1848##x )
     31 
     32 #define c_d_c_AD1848REGSEL	0
     33 #define c_d_c_AD1848REG		1
     34 #define c_d_c_AD1848STATUS	2
     35 #define c_d_c_AD1848PIO		3
     36 
     37 /* codec registers */
     38 
     39 #define AD1848_LEFT_INPUT	0x00	/* left input control */
     40 #define AD1848_RIGHT_INPUT	0x01	/* right input control */
     41 #define AD1848_AUX1_LEFT_INPUT	0x02	/* left AUX1 input control */
     42 #define AD1848_AUX1_RIGHT_INPUT	0x03	/* right AUX1 input control */
     43 #define AD1848_AUX2_LEFT_INPUT	0x04	/* left AUX2 input control */
     44 #define AD1848_AUX2_RIGHT_INPUT	0x05	/* right AUX2 input control */
     45 #define AD1848_LEFT_OUTPUT	0x06	/* left output control register */
     46 #define AD1848_RIGHT_OUTPUT	0x07	/* right output control register */
     47 #define AD1848_DATA_FORMAT	0x08	/* clock and data format - playback/capture - bits 7-0 MCE */
     48 #define AD1848_IFACE_CTRL	0x09	/* interface control - bits 7-2 MCE */
     49 #define AD1848_PIN_CTRL		0x0a	/* pin control */
     50 #define AD1848_TEST_INIT	0x0b	/* test and initialization */
     51 #define AD1848_MISC_INFO	0x0c	/* miscellaneaous information */
     52 #define AD1848_LOOPBACK		0x0d	/* loopback control */
     53 #define AD1848_DATA_UPR_CNT	0x0e	/* playback/capture upper base count */
     54 #define AD1848_DATA_LWR_CNT	0x0f	/* playback/capture lower base count */
     55 
     56 /* definitions for codec register select port - CODECP( REGSEL ) */
     57 
     58 #define AD1848_INIT		0x80	/* CODEC is initializing */
     59 #define AD1848_MCE		0x40	/* mode change enable */
     60 #define AD1848_TRD		0x20	/* transfer request disable */
     61 
     62 /* definitions for codec status register - CODECP( STATUS ) */
     63 
     64 #define AD1848_GLOBALIRQ	0x01	/* IRQ is active */
     65 
     66 /* definitions for AD1848_LEFT_INPUT and AD1848_RIGHT_INPUT registers */
     67 
     68 #define AD1848_ENABLE_MIC_GAIN	0x20
     69 
     70 #define AD1848_MIXS_LINE1	0x00
     71 #define AD1848_MIXS_AUX1	0x40
     72 #define AD1848_MIXS_LINE2	0x80
     73 #define AD1848_MIXS_ALL		0xc0
     74 
     75 /* definitions for clock and data format register - AD1848_PLAYBK_FORMAT */
     76 
     77 #define AD1848_LINEAR_8		0x00	/* 8-bit unsigned data */
     78 #define AD1848_ALAW_8		0x60	/* 8-bit A-law companded */
     79 #define AD1848_ULAW_8		0x20	/* 8-bit U-law companded */
     80 #define AD1848_LINEAR_16	0x40	/* 16-bit twos complement data - little endian */
     81 #define AD1848_STEREO		0x10	/* stereo mode */
     82 /* bits 3-1 define frequency divisor */
     83 #define AD1848_XTAL1		0x00	/* 24.576 crystal */
     84 #define AD1848_XTAL2		0x01	/* 16.9344 crystal */
     85 
     86 /* definitions for interface control register - AD1848_IFACE_CTRL */
     87 
     88 #define AD1848_CAPTURE_PIO	0x80	/* capture PIO enable */
     89 #define AD1848_PLAYBACK_PIO	0x40	/* playback PIO enable */
     90 #define AD1848_CALIB_MODE	0x18	/* calibration mode bits */
     91 #define AD1848_AUTOCALIB	0x08	/* auto calibrate */
     92 #define AD1848_SINGLE_DMA	0x04	/* use single DMA channel */
     93 #define AD1848_CAPTURE_ENABLE	0x02	/* capture enable */
     94 #define AD1848_PLAYBACK_ENABLE	0x01	/* playback enable */
     95 
     96 /* definitions for pin control register - AD1848_PIN_CTRL */
     97 
     98 #define AD1848_IRQ_ENABLE	0x02	/* enable IRQ */
     99 #define AD1848_XCTL1		0x40	/* external control #1 */
    100 #define AD1848_XCTL0		0x80	/* external control #0 */
    101 
    102 /* definitions for test and init register - AD1848_TEST_INIT */
    103 
    104 #define AD1848_CALIB_IN_PROGRESS 0x20	/* auto calibrate in progress */
    105 #define AD1848_DMA_REQUEST	0x10	/* DMA request in progress */
    106 
    107 /* defines for codec.mode */
    108 
    109 #define AD1848_MODE_NONE	0x0000
    110 #define AD1848_MODE_PLAY	0x0001
    111 #define AD1848_MODE_CAPTURE	0x0002
    112 #define AD1848_MODE_TIMER	0x0004
    113 #define AD1848_MODE_OPEN	(AD1848_MODE_PLAY|AD1848_MODE_CAPTURE|AD1848_MODE_TIMER)
    114 #define AD1848_MODE_RUNNING	0x0010
    115 
    116 /* defines for codec.hardware */
    117 
    118 #define AD1848_HW_DETECT	0x0000	/* let AD1848 driver detect chip */
    119 #define AD1848_HW_AD1847	0x0001	/* AD1847 chip */
    120 #define AD1848_HW_AD1848	0x0002	/* AD1848 chip */
    121 #define AD1848_HW_CS4248	0x0003	/* CS4248 chip */
    122 #define AD1848_HW_CMI8330	0x0004	/* CMI8330 chip */
    123 #define AD1848_HW_THINKPAD	0x0005	/* Thinkpad 360/750/755 */
    124 
    125 /* IBM Thinkpad specific stuff */
    126 #define AD1848_THINKPAD_CTL_PORT1		0x15e8
    127 #define AD1848_THINKPAD_CTL_PORT2		0x15e9
    128 #define AD1848_THINKPAD_CS4248_ENABLE_BIT	0x02
    129 
    130 struct snd_ad1848 {
    131 	unsigned long port;		/* i/o port */
    132 	struct resource *res_port;
    133 	int irq;			/* IRQ line */
    134 	int dma;			/* data DMA */
    135 	unsigned short version;		/* version of CODEC chip */
    136 	unsigned short mode;		/* see to AD1848_MODE_XXXX */
    137 	unsigned short hardware;	/* see to AD1848_HW_XXXX */
    138 	unsigned short single_dma:1;	/* forced single DMA mode (GUS 16-bit daughter board) or dma1 == dma2 */
    139 
    140 	struct snd_pcm *pcm;
    141 	struct snd_pcm_substream *playback_substream;
    142 	struct snd_pcm_substream *capture_substream;
    143 	struct snd_card *card;
    144 
    145 	unsigned char image[32];	/* SGalaxy needs an access to extended registers */
    146 	int mce_bit;
    147 	int calibrate_mute;
    148 	int dma_size;
    149 	int thinkpad_flag;		/* Thinkpad CS4248 needs some extra help */
    150 
    151 #ifdef CONFIG_PM
    152 	void (*suspend)(struct snd_ad1848 *chip);
    153 	void (*resume)(struct snd_ad1848 *chip);
    154 #endif
    155 
    156 	spinlock_t reg_lock;
    157 };
    158 
    159 /* exported functions */
    160 
    161 void snd_ad1848_out(struct snd_ad1848 *chip, unsigned char reg, unsigned char value);
    162 
    163 int snd_ad1848_create(struct snd_card *card,
    164 		      unsigned long port,
    165 		      int irq, int dma,
    166 		      unsigned short hardware,
    167 		      struct snd_ad1848 ** chip);
    168 
    169 int snd_ad1848_pcm(struct snd_ad1848 * chip, int device, struct snd_pcm **rpcm);
    170 const struct snd_pcm_ops *snd_ad1848_get_pcm_ops(int direction);
    171 int snd_ad1848_mixer(struct snd_ad1848 * chip);
    172 
    173 /* exported mixer stuffs */
    174 enum { AD1848_MIX_SINGLE, AD1848_MIX_DOUBLE, AD1848_MIX_CAPTURE };
    175 
    176 #define AD1848_MIXVAL_SINGLE(reg, shift, mask, invert) \
    177 	((reg) | ((shift) << 8) | ((mask) << 16) | ((invert) << 24))
    178 #define AD1848_MIXVAL_DOUBLE(left_reg, right_reg, shift_left, shift_right, mask, invert) \
    179 	((left_reg) | ((right_reg) << 8) | ((shift_left) << 16) | ((shift_right) << 19) | ((mask) << 24) | ((invert) << 22))
    180 
    181 /* for ease of use */
    182 struct ad1848_mix_elem {
    183 	const char *name;
    184 	int index;
    185 	int type;
    186 	unsigned long private_value;
    187 	const unsigned int *tlv;
    188 };
    189 
    190 #define AD1848_SINGLE(xname, xindex, reg, shift, mask, invert) \
    191 { .name = xname, \
    192   .index = xindex, \
    193   .type = AD1848_MIX_SINGLE, \
    194   .private_value = AD1848_MIXVAL_SINGLE(reg, shift, mask, invert) }
    195 
    196 #define AD1848_SINGLE_TLV(xname, xindex, reg, shift, mask, invert, xtlv) \
    197 { .name = xname, \
    198   .index = xindex, \
    199   .type = AD1848_MIX_SINGLE, \
    200   .private_value = AD1848_MIXVAL_SINGLE(reg, shift, mask, invert), \
    201   .tlv = xtlv }
    202 
    203 #define AD1848_DOUBLE(xname, xindex, left_reg, right_reg, shift_left, shift_right, mask, invert) \
    204 { .name = xname, \
    205   .index = xindex, \
    206   .type = AD1848_MIX_DOUBLE, \
    207   .private_value = AD1848_MIXVAL_DOUBLE(left_reg, right_reg, shift_left, shift_right, mask, invert) }
    208 
    209 #define AD1848_DOUBLE_TLV(xname, xindex, left_reg, right_reg, shift_left, shift_right, mask, invert, xtlv) \
    210 { .name = xname, \
    211   .index = xindex, \
    212   .type = AD1848_MIX_DOUBLE, \
    213   .private_value = AD1848_MIXVAL_DOUBLE(left_reg, right_reg, shift_left, shift_right, mask, invert), \
    214   .tlv = xtlv }
    215 
    216 int snd_ad1848_add_ctl_elem(struct snd_ad1848 *chip, const struct ad1848_mix_elem *c);
    217 
    218 #endif /* __SOUND_AD1848_H */
    219