1 /* $OpenBSD: endian.h,v 1.3 2005/12/13 00:35:23 millert Exp $ */ 2 3 /* 4 * Copyright (C) 2010 The Android Open Source Project 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * * Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * * Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in 14 * the documentation and/or other materials provided with the 15 * distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 18 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 19 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 20 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 21 * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, 22 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 23 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS 24 * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 25 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 26 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT 27 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 28 * SUCH DAMAGE. 29 */ 30 31 #ifndef _ARM_ENDIAN_H_ 32 #define _ARM_ENDIAN_H_ 33 34 #ifdef __GNUC__ 35 36 /* 37 * REV and REV16 weren't available on ARM5 or ARM4. 38 * We don't include <machine/cpu-features.h> because it pollutes the 39 * namespace with macros like PLD. 40 */ 41 #if !defined __ARM_ARCH_5__ && !defined __ARM_ARCH_5T__ && \ 42 !defined __ARM_ARCH_5TE__ && !defined __ARM_ARCH_5TEJ__ && \ 43 !defined __ARM_ARCH_4T__ && !defined __ARM_ARCH_4__ 44 45 /* According to RealView Assembler User's Guide, REV and REV16 are available 46 * in Thumb code and 16-bit instructions when used in Thumb-2 code. 47 * 48 * REV Rd, Rm 49 * Rd and Rm must both be Lo registers. 50 * 51 * REV16 Rd, Rm 52 * Rd and Rm must both be Lo registers. 53 * 54 * The +l constraint takes care of this without constraining us in ARM mode. 55 */ 56 #define __swap16md(x) ({ \ 57 register u_int16_t _x = (x); \ 58 __asm volatile ("rev16 %0, %0" : "+l" (_x)); \ 59 _x; \ 60 }) 61 62 #define __swap32md(x) ({ \ 63 register u_int32_t _x = (x); \ 64 __asm volatile ("rev %0, %0" : "+l" (_x)); \ 65 _x; \ 66 }) 67 68 #define __swap64md(x) ({ \ 69 u_int64_t _swap64md_x = (x); \ 70 (u_int64_t) __swap32md(_swap64md_x >> 32) | \ 71 (u_int64_t) __swap32md(_swap64md_x & 0xffffffff) << 32; \ 72 }) 73 74 /* Tell sys/endian.h we have MD variants of the swap macros. */ 75 #define MD_SWAP 76 77 #endif /* __ARM_ARCH__ */ 78 #endif /* __GNUC__ */ 79 80 #if defined(__ARMEB__) 81 #define _BYTE_ORDER _BIG_ENDIAN 82 #else 83 #define _BYTE_ORDER _LITTLE_ENDIAN 84 #endif 85 #define __STRICT_ALIGNMENT 86 #include <sys/types.h> 87 #include <sys/endian.h> 88 89 #endif /* !_ARM_ENDIAN_H_ */ 90
