Lines Matching full:aarch64
1 //===-- AArch64ISelDAGToDAG.cpp - A dag to dag inst selector for AArch64 --===//
10 // This file defines an instruction selector for the AArch64 target.
14 #define DEBUG_TYPE "aarch64-isel"
15 #include "AArch64.h"
29 /// AArch64 specific code to select AArch64 machine instructions for
49 return "AArch64 Instruction Selection";
152 default: llvm_unreachable("Unrecognised AArch64 memory constraint");
205 MOVOpcode = DestWidth == 64 ? AArch64::MOVZxii : AArch64::MOVZwii;
208 MOVOpcode = DestWidth == 64 ? AArch64::MOVNxii : AArch64::MOVNwii;
213 MOVOpcode = AArch64::MOVNwii;
215 MOVOpcode = DestWidth == 64 ? AArch64::ORRxxi : AArch64::ORRwwi;
216 uint16_t ZR = DestWidth == 64 ? AArch64::XZR : AArch64::WZR;
236 CurDAG->getTargetConstant(AArch64::sub_32, MVT::i32));
260 AArch64::MOVZxii, DL, PtrVT,
264 AArch64::MOVKxii, DL, PtrVT, SDValue(LitAddr, 0),
268 AArch64::MOVKxii, DL, PtrVT, SDValue(LitAddr, 0),
272 AArch64::MOVKxii, DL, PtrVT, SDValue(LitAddr, 0),
405 AArch64::ATOMIC_LOAD_ADD_I8,
406 AArch64::ATOMIC_LOAD_ADD_I16,
407 AArch64::ATOMIC_LOAD_ADD_I32,
408 AArch64::ATOMIC_LOAD_ADD_I64);
411 AArch64::ATOMIC_LOAD_SUB_I8,
412 AArch64::ATOMIC_LOAD_SUB_I16,
413 AArch64::ATOMIC_LOAD_SUB_I32,
414 AArch64::ATOMIC_LOAD_SUB_I64);
417 AArch64::ATOMIC_LOAD_AND_I8,
418 AArch64::ATOMIC_LOAD_AND_I16,
419 AArch64::ATOMIC_LOAD_AND_I32,
420 AArch64::ATOMIC_LOAD_AND_I64);
423 AArch64::ATOMIC_LOAD_OR_I8,
424 AArch64::ATOMIC_LOAD_OR_I16,
425 AArch64::ATOMIC_LOAD_OR_I32,
426 AArch64::ATOMIC_LOAD_OR_I64);
429 AArch64::ATOMIC_LOAD_XOR_I8,
430 AArch64::ATOMIC_LOAD_XOR_I16,
431 AArch64::ATOMIC_LOAD_XOR_I32,
432 AArch64::ATOMIC_LOAD_XOR_I64);
435 AArch64::ATOMIC_LOAD_NAND_I8,
436 AArch64::ATOMIC_LOAD_NAND_I16,
437 AArch64::ATOMIC_LOAD_NAND_I32,
438 AArch64::ATOMIC_LOAD_NAND_I64);
441 AArch64::ATOMIC_LOAD_MIN_I8,
442 AArch64::ATOMIC_LOAD_MIN_I16,
443 AArch64::ATOMIC_LOAD_MIN_I32,
444 AArch64::ATOMIC_LOAD_MIN_I64);
447 AArch64::ATOMIC_LOAD_MAX_I8,
448 AArch64::ATOMIC_LOAD_MAX_I16,
449 AArch64::ATOMIC_LOAD_MAX_I32,
450 AArch64::ATOMIC_LOAD_MAX_I64);
453 AArch64::ATOMIC_LOAD_UMIN_I8,
454 AArch64::ATOMIC_LOAD_UMIN_I16,
455 AArch64::ATOMIC_LOAD_UMIN_I32,
456 AArch64::ATOMIC_LOAD_UMIN_I64);
459 AArch64::ATOMIC_LOAD_UMAX_I8,
460 AArch64::ATOMIC_LOAD_UMAX_I16,
461 AArch64::ATOMIC_LOAD_UMAX_I32,
462 AArch64::ATOMIC_LOAD_UMAX_I64);
465 AArch64::ATOMIC_SWAP_I8,
466 AArch64::ATOMIC_SWAP_I16,
467 AArch64::ATOMIC_SWAP_I32,
468 AArch64::ATOMIC_SWAP_I64);
471 AArch64::ATOMIC_CMP_SWAP_I8,
472 AArch64::ATOMIC_CMP_SWAP_I16,
473 AArch64::ATOMIC_CMP_SWAP_I32,
474 AArch64::ATOMIC_CMP_SWAP_I64);
479 return CurDAG->SelectNodeTo(Node, AArch64::ADDxxi_lsl0_s, PtrTy,
499 uint16_t Register = Ty == MVT::i32 ? AArch64::WZR : AArch64::XZR;
554 /// This pass converts a legalized DAG into a AArch64-specific DAG, ready for
