Lines Matching full:b1101
656 let Rm = 0b1101; // NLdSt will assign to the right encoding bits.
673 let Rm = 0b1101; // NLdSt will assign to the right encoding bits.
709 let Rm = 0b1101; // NLdSt will assign to the right encoding bits.
748 let Rm = 0b1101; // NLdSt will assign to the right encoding bits.
803 let Rm = 0b1101; // NLdSt will assign to the right encoding bits.
1338 let Rm = 0b1101; // NLdSt will assign to the right encoding bits.
1357 let Rm = 0b1101; // NLdSt will assign to the right encoding bits.
1381 : NLdSt<1, 0b10, 0b1101, op7_4, (outs VdTy:$Vd),
1400 def _fixed : NLdSt<1, 0b10, 0b1101, op7_4,
1405 let Rm = 0b1101; // NLdSt will assign to the right encoding bits.
1409 def _register : NLdSt<1, 0b10, 0b1101, op7_4,
1593 let Rm = 0b1101; // NLdSt will assign to the right encoding bits.
1611 let Rm = 0b1101; // NLdSt will assign to the right encoding bits.
1649 let Rm = 0b1101; // NLdSt will assign to the right encoding bits.
1692 let Rm = 0b1101; // NLdSt will assign to the right encoding bits.
1749 let Rm = 0b1101; // NLdSt will assign to the right encoding bits.
1766 let Rm = 0b1101; // NLdSt will assign to the right encoding bits.
3942 def VADDfd : N3VD<0, 0, 0b00, 0b1101, 0, IIC_VBIND, "vadd", "f32",
3944 def VADDfq : N3VQ<0, 0, 0b00, 0b1101, 0, IIC_VBINQ, "vadd", "f32",
3991 def VMULfd : N3VD<1, 0, 0b00, 0b1101, 1, IIC_VFMULD, "vmul", "f32",
3993 def VMULfq : N3VQ<1, 0, 0b00, 0b1101, 1, IIC_VFMULQ, "vmul", "f32",
4045 defm VQRDMULHsl : N3VIntSL_HS<0b1101, IIC_VMULi16D, IIC_VMULi32D,
4074 defm VQDMULL : N3VLInt_HS<0,1,0b1101,0, IIC_VMULi16D, IIC_VMULi32D,
4084 def VMLAfd : N3VDMulOp<0, 0, 0b00, 0b1101, 1, IIC_VMACD, "vmla", "f32",
4087 def VMLAfq : N3VQMulOp<0, 0, 0b00, 0b1101, 1, IIC_VMACQ, "vmla", "f32",
4142 def VMLSfd : N3VDMulOp<0, 0, 0b10, 0b1101, 1, IIC_VMACD, "vmls", "f32",
4145 def VMLSfq : N3VQMulOp<0, 0, 0b10, 0b1101, 1, IIC_VMACQ, "vmls", "f32",
4232 def VSUBfd : N3VD<0, 0, 0b10, 0b1101, 0, IIC_VBIND, "vsub", "f32",
4234 def VSUBfq : N3VQ<0, 0, 0b10, 0b1101, 0, IIC_VBINQ, "vsub", "f32",
4631 def VABDfd : N3VDInt<1, 0, 0b10, 0b1101, 0, N3RegFrm, IIC_VBIND,
4633 def VABDfq : N3VQInt<1, 0, 0b10, 0b1101, 0, N3RegFrm, IIC_VBINQ,
4720 def VPADDf : N3VDInt<1, 0, 0b00, 0b1101, 0, N3RegFrm,
