Lines Matching full:vldm
2021 // LDM/VLDM/VLDn address generation latency & resources.
2032 // For unknown LDM/VLDM/VSTM, assume 2 32-bit registers.
2141 // Define VLDM/VSTM PreRA resources.
2144 // preRA VLDM variants in which all 64-bit loads are written to the
2155 // For unknown VLDM/VSTM PreRA, assume 2xS registers.
2158 // Define VLDM/VSTM PostRA Resources.
2176 // VLDM PostRA Variants. These variants expand A9WriteLMfpPostRA into a
2231 // VLDM/VSTM instructions.
2237 // VLDM represents all destination registers as a single register
2244 // Resources for other (non LDM/VLDM) Variants.
2374 // Note: Unlike VLDM, VLD1 expects the writeback operand after the
