Lines Matching defs:CC
113 SDValue SelectCC(SDValue LHS, SDValue RHS, ISD::CondCode CC, SDLoc dl);
472 ISD::CondCode CC, SDLoc dl) {
478 if (CC == ISD::SETEQ || CC == ISD::SETNE) {
504 } else if (ISD::isUnsignedIntSetCC(CC)) {
519 if (CC == ISD::SETEQ || CC == ISD::SETNE) {
547 } else if (ISD::isUnsignedIntSetCC(CC)) {
569 static PPC::Predicate getPredicateForSetCC(ISD::CondCode CC) {
570 switch (CC) {
600 static unsigned getCRIdxForSetCC(ISD::CondCode CC, bool &Invert) {
602 switch (CC) {
632 static unsigned int getVCmpInst(MVT::SimpleValueType VecVT, ISD::CondCode CC) {
633 switch (CC) {
714 ISD::CondCode CC = cast<CondCodeSDNode>(N->getOperand(2))->get();
724 switch (CC) {
753 switch (CC) {
799 unsigned int VCmpInst = getVCmpInst(VT, CC);
801 switch (CC) {
849 CC, Inv);
850 SDValue CCReg = SelectCC(LHS, RHS, CC, dl);
1181 ISD::CondCode CC = cast<CondCodeSDNode>(N->getOperand(4))->get();
1185 // Handle the setcc cases here. select_cc lhs, 0, 1, 0, cc
1191 N2C->getZExtValue() == 1ULL && CC == ISD::SETNE &&
1202 SDValue CCReg = SelectCC(N->getOperand(0), N->getOperand(1), CC, dl);
1203 unsigned BROpc = getPredicateForSetCC(CC);
1244 ISD::CondCode CC = cast<CondCodeSDNode>(N->getOperand(1))->get();
1245 SDValue CondCode = SelectCC(N->getOperand(2), N->getOperand(3), CC, dl);
1246 SDValue Ops[] = { getI32Imm(getPredicateForSetCC(CC)), CondCode,
