Lines Matching full:live
11 // pseudo registers into register stack instructions. This pass uses live
17 // partitioned into bundles where the same FP registers must be live in
19 // block to rearrange the live registers to match the outgoing bundle.
22 // live register shuffling instructions when critical edges are present.
79 // LiveBundle. It represents a set of CFG edges where the live FP stack
86 // The set of live FP registers in a LiveBundle is calculated by bundleCFG,
89 // Bit mask of live FP registers. Bit 0 = FP0, bit 1 = FP1, &c.
92 // Number of pre-assigned live registers in FixStack. This is 0 when the
96 // Assigned stack order for live-in registers.
102 // Have the live registers been assigned a stack order yet?
107 // with no live FP registers.
113 // Return a bitmask of FP registers in block's live-in list.
131 // The hardware keeps track of how many FP registers are live, so we have
132 // to model that exactly. Usually, each live register corresponds to an
134 // assembly, it is sometimes necessary to have live scratch registers.
142 // For each live FP<n> register, point to its Stack[] entry.
144 // used when we need slightly different live registers than what the
158 // It can happen that we need an ST register to be live when no FP register
164 // value. That means every register in PendingST must be live.
172 // Shuffle live registers to match the expectations of successor blocks.
195 /// isLive - Is RegNo currently live in the stack?
296 /// Adjust the live registers to be the set in Mask.
385 /// bundleCFG - Scan all the basic blocks to determine consistent live-in and
386 /// live-out sets for the FP registers. Consistent means that the set of
387 /// registers live-out from a block is identical to the live-in set of all
388 /// successors. This is not enforced by the normal live-in lists since
394 // Gather the actual live-in masks for all MBBs.
495 /// setupBlockStack - Use the live bundles to set up our model of the stack
496 /// to match predecessors' live out stack.
498 DEBUG(dbgs() << "\nSetting up live-ins for BB#" << MBB->getNumber()
501 // Get the live-in bundle for MBB.
506 DEBUG(dbgs() << "Block has no FP live-ins.\n");
513 // Push the fixed live-in registers.
516 DEBUG(dbgs() << "Live-in st(" << (i-1) << "): %FP"
521 // Kill off unwanted live-ins. This can happen with a critical edge.
522 // FIXME: We could keep these live registers around as zombies. They may need
528 /// finishBlockStack - Revive live-outs that are implicitly defined out of
529 /// MBB. Shuffle live registers to match the expected fixed stack of any
537 DEBUG(dbgs() << "Setting up live-outs for BB#" << MBB->getNumber()
540 // Get MBB's live-out bundle.
550 DEBUG(dbgs() << "No live-outs.\n");
880 /// registers with a bit in Mask are live.
887 // This register is live, but we don't want it.
890 // We don't need to imp-def this live register.
936 // Now we should have the correct registers live.
938 assert(StackTop == CountPopulation_32(Mask) && "Live count mismatch");
1187 // All of the operands are live after this instruction executes, so we
1338 // STi could still be live from a previous inline asm.
1363 assert(!isLive(DstFP) && "Cannot copy ST to live FP register");
1412 // to mean that there is one more live register on the stack than we
1551 // if the FP register needs to be live after the instruction, or if it is
1564 // Make sure we have a unique live register for every fixed use. Some of
1592 // Now we can rearrange the live registers to match what was requested.
1693 "Ret only defs operands, and values aren't live beyond it");
1708 // We may have been carrying spurious live-ins, so make sure only the returned
1709 // registers are left live.
1744 assert(StackTop == 2 && "Must have two values live!");
1749 assert(getStackEntry(1) == FirstFPRegOp && "Unknown regs live");
1755 assert(getStackEntry(0) == FirstFPRegOp && "Unknown regs live");
1756 assert(getStackEntry(1) == SecondFPRegOp && "Unknown regs live");
