Lines Matching defs:Opcode
1433 static bool isFrameLoadOpcode(int Opcode) {
1434 switch (Opcode) {
1461 static bool isFrameStoreOpcode(int Opcode) {
1462 switch (Opcode) {
2393 /// getCondFromSETOpc - return condition code of a SET opcode.
2416 /// getCondFromCmovOpc - return condition code of a CMov opcode.
2536 /// getSETFromCond - Return a set opcode for the given condition and
2563 /// getCMovFromCond - Return a cmov opcode for the given condition,
3502 // We decode the condition code from opcode.
3528 // We swap the condition code and synthesize the new opcode.
3532 // Synthesize the new opcode.
3736 static MachineInstr *FuseTwoAddrInst(MachineFunction &MF, unsigned Opcode,
3742 MachineInstr *NewMI = MF.CreateMachineInstr(TII.get(Opcode),
3765 unsigned Opcode, unsigned OpNo,
3769 MachineInstr *NewMI = MF.CreateMachineInstr(TII.get(Opcode),
3789 static MachineInstr *MakeM0Inst(const TargetInstrInfo &TII, unsigned Opcode,
3793 MachineInstrBuilder MIB = BuildMI(MF, MI->getDebugLoc(), TII.get(Opcode));
3857 // Find the Opcode to fuse
3861 unsigned Opcode = I->second.first;
3871 if (Opcode != X86::MOV64rm || RCSize != 8 || Size != 4)
3878 Opcode = X86::MOV32rm;
3884 NewMI = FuseTwoAddrInst(MF, Opcode, MOs, MI, *this);
3886 NewMI = FuseInst(MF, Opcode, i, MOs, MI, *this);
3925 static bool hasPartialRegUpdate(unsigned Opcode) {
3926 switch (Opcode) {
4917 static const uint16_t *lookup(unsigned opcode, unsigned domain) {
4919 if (ReplaceableInstrs[i][domain-1] == opcode)
4924 static const uint16_t *lookupAVX2(unsigned opcode, unsigned domain) {
4926 if (ReplaceableInstrsAVX2[i][domain-1] == opcode)
