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      1 //===-- ARMMCInstLower.cpp - Convert ARM MachineInstr to an MCInst --------===//
      2 //
      3 //                     The LLVM Compiler Infrastructure
      4 //
      5 // This file is distributed under the University of Illinois Open Source
      6 // License. See LICENSE.TXT for details.
      7 //
      8 //===----------------------------------------------------------------------===//
      9 //
     10 // This file contains code to lower ARM MachineInstrs to their corresponding
     11 // MCInst records.
     12 //
     13 //===----------------------------------------------------------------------===//
     14 
     15 #include "ARM.h"
     16 #include "ARMAsmPrinter.h"
     17 #include "MCTargetDesc/ARMMCExpr.h"
     18 #include "llvm/CodeGen/MachineBasicBlock.h"
     19 #include "llvm/IR/Constants.h"
     20 #include "llvm/MC/MCExpr.h"
     21 #include "llvm/MC/MCInst.h"
     22 #include "llvm/Target/Mangler.h"
     23 using namespace llvm;
     24 
     25 
     26 MCOperand ARMAsmPrinter::GetSymbolRef(const MachineOperand &MO,
     27                                       const MCSymbol *Symbol) {
     28   const MCExpr *Expr;
     29   switch (MO.getTargetFlags()) {
     30   default: {
     31     Expr = MCSymbolRefExpr::Create(Symbol, MCSymbolRefExpr::VK_None,
     32                                    OutContext);
     33     switch (MO.getTargetFlags()) {
     34     default: llvm_unreachable("Unknown target flag on symbol operand");
     35     case 0:
     36       break;
     37     case ARMII::MO_LO16:
     38       Expr = MCSymbolRefExpr::Create(Symbol, MCSymbolRefExpr::VK_None,
     39                                      OutContext);
     40       Expr = ARMMCExpr::CreateLower16(Expr, OutContext);
     41       break;
     42     case ARMII::MO_HI16:
     43       Expr = MCSymbolRefExpr::Create(Symbol, MCSymbolRefExpr::VK_None,
     44                                      OutContext);
     45       Expr = ARMMCExpr::CreateUpper16(Expr, OutContext);
     46       break;
     47     }
     48     break;
     49   }
     50 
     51   case ARMII::MO_PLT:
     52     Expr = MCSymbolRefExpr::Create(Symbol, MCSymbolRefExpr::VK_ARM_PLT,
     53                                    OutContext);
     54     break;
     55   }
     56 
     57   if (!MO.isJTI() && MO.getOffset())
     58     Expr = MCBinaryExpr::CreateAdd(Expr,
     59                                    MCConstantExpr::Create(MO.getOffset(),
     60                                                           OutContext),
     61                                    OutContext);
     62   return MCOperand::CreateExpr(Expr);
     63 
     64 }
     65 
     66 bool ARMAsmPrinter::lowerOperand(const MachineOperand &MO,
     67                                  MCOperand &MCOp) {
     68   switch (MO.getType()) {
     69   default: llvm_unreachable("unknown operand type");
     70   case MachineOperand::MO_Register:
     71     // Ignore all non-CPSR implicit register operands.
     72     if (MO.isImplicit() && MO.getReg() != ARM::CPSR)
     73       return false;
     74     assert(!MO.getSubReg() && "Subregs should be eliminated!");
     75     MCOp = MCOperand::CreateReg(MO.getReg());
     76     break;
     77   case MachineOperand::MO_Immediate:
     78     MCOp = MCOperand::CreateImm(MO.getImm());
     79     break;
     80   case MachineOperand::MO_MachineBasicBlock:
     81     MCOp = MCOperand::CreateExpr(MCSymbolRefExpr::Create(
     82         MO.getMBB()->getSymbol(), OutContext));
     83     break;
     84   case MachineOperand::MO_GlobalAddress:
     85     MCOp = GetSymbolRef(MO, Mang->getSymbol(MO.getGlobal()));
     86     break;
     87   case MachineOperand::MO_ExternalSymbol:
     88    MCOp = GetSymbolRef(MO,
     89                         GetExternalSymbolSymbol(MO.getSymbolName()));
     90     break;
     91   case MachineOperand::MO_JumpTableIndex:
     92     MCOp = GetSymbolRef(MO, GetJTISymbol(MO.getIndex()));
     93     break;
     94   case MachineOperand::MO_ConstantPoolIndex:
     95     MCOp = GetSymbolRef(MO, GetCPISymbol(MO.getIndex()));
     96     break;
     97   case MachineOperand::MO_BlockAddress:
     98     MCOp = GetSymbolRef(MO, GetBlockAddressSymbol(MO.getBlockAddress()));
     99     break;
    100   case MachineOperand::MO_FPImmediate: {
    101     APFloat Val = MO.getFPImm()->getValueAPF();
    102     bool ignored;
    103     Val.convert(APFloat::IEEEdouble, APFloat::rmTowardZero, &ignored);
    104     MCOp = MCOperand::CreateFPImm(Val.convertToDouble());
    105     break;
    106   }
    107   case MachineOperand::MO_RegisterMask:
    108     // Ignore call clobbers.
    109     return false;
    110   }
    111   return true;
    112 }
    113 
    114 void llvm::LowerARMMachineInstrToMCInst(const MachineInstr *MI, MCInst &OutMI,
    115                                         ARMAsmPrinter &AP) {
    116   OutMI.setOpcode(MI->getOpcode());
    117 
    118   for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
    119     const MachineOperand &MO = MI->getOperand(i);
    120 
    121     MCOperand MCOp;
    122     if (AP.lowerOperand(MO, MCOp))
    123       OutMI.addOperand(MCOp);
    124   }
    125 }
    126