| /external/llvm/lib/MC/ |
| MCCodeGenInfo.cpp | 19 CodeGenOpt::Level OL) {
22 OptLevel = OL;
|
| /external/llvm/lib/Target/Sparc/ |
| SparcTargetMachine.cpp | 32 CodeGenOpt::Level OL,
34 : LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL),
84 CodeGenOpt::Level OL)
85 : SparcTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, false) {
96 CodeGenOpt::Level OL)
97 : SparcTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, true) {
|
| SparcTargetMachine.h | 39 CodeGenOpt::Level OL, bool is64bit);
70 CodeGenOpt::Level OL);
82 CodeGenOpt::Level OL);
|
| /external/llvm/lib/Target/NVPTX/ |
| NVPTXTargetMachine.cpp | 72 CodeGenOpt::Level OL, bool is64bit)
73 : LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL),
86 CodeGenOpt::Level OL)
87 : NVPTXTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, false) {}
94 CodeGenOpt::Level OL)
95 : NVPTXTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, true) {}
|
| NVPTXTargetMachine.h | 104 CodeGenOpt::Level OL);
113 CodeGenOpt::Level OL);
|
| /external/llvm/lib/Target/MSP430/ |
| MSP430TargetMachine.cpp | 33 CodeGenOpt::Level OL)
34 : LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL),
|
| MSP430TargetMachine.h | 44 CodeGenOpt::Level OL);
|
| /external/llvm/lib/Target/XCore/ |
| XCoreTargetMachine.cpp | 27 CodeGenOpt::Level OL)
28 : LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL),
|
| /external/llvm/include/llvm/MC/ |
| MCCodeGenInfo.h | 38 CodeGenOpt::Level OL = CodeGenOpt::Default);
|
| /external/llvm/lib/Target/Sparc/MCTargetDesc/ |
| SparcMCTargetDesc.cpp | 66 CodeGenOpt::Level OL) {
73 X->InitMCCodeGenInfo(RM, CM, OL);
79 CodeGenOpt::Level OL) {
86 X->InitMCCodeGenInfo(RM, CM, OL);
|
| /external/llvm/lib/Target/PowerPC/ |
| PPCTargetMachine.h | 44 CodeGenOpt::Level OL, bool is64Bit);
84 CodeGenOpt::Level OL);
95 CodeGenOpt::Level OL);
|
| PPCTargetMachine.cpp | 40 CodeGenOpt::Level OL,
42 : LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL),
61 CodeGenOpt::Level OL)
62 : PPCTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, false) {
71 CodeGenOpt::Level OL)
72 : PPCTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, true) {
|
| /external/llvm/lib/Target/X86/ |
| X86TargetMachine.cpp | 37 CodeGenOpt::Level OL)
38 : X86TargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, false),
61 CodeGenOpt::Level OL)
62 : X86TargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, true),
82 CodeGenOpt::Level OL,
84 : LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL),
|
| X86TargetMachine.h | 41 CodeGenOpt::Level OL,
90 CodeGenOpt::Level OL);
119 CodeGenOpt::Level OL);
|
| /external/llvm/lib/Target/ARM/ |
| ARMTargetMachine.h | 45 CodeGenOpt::Level OL);
80 CodeGenOpt::Level OL);
118 CodeGenOpt::Level OL);
|
| /external/llvm/lib/Target/Mips/ |
| MipsTargetMachine.h | 54 CodeGenOpt::Level OL,
109 CodeGenOpt::Level OL);
120 CodeGenOpt::Level OL);
|
| /external/llvm/lib/Target/CppBackend/ |
| CPPTargetMachine.h | 28 CodeGenOpt::Level OL)
|
| /external/llvm/lib/Target/AArch64/ |
| AArch64TargetMachine.cpp | 33 CodeGenOpt::Level OL)
34 : LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL),
|
| AArch64TargetMachine.h | 39 CodeGenOpt::Level OL);
|
| /external/llvm/lib/Target/Hexagon/MCTargetDesc/ |
| HexagonMCTargetDesc.cpp | 71 CodeGenOpt::Level OL) {
75 X->InitMCCodeGenInfo(Reloc::Static, CM, OL);
|
| /external/llvm/lib/Target/MSP430/MCTargetDesc/ |
| MSP430MCTargetDesc.cpp | 55 CodeGenOpt::Level OL) {
57 X->InitMCCodeGenInfo(RM, CM, OL);
|
| /external/llvm/lib/Target/SystemZ/ |
| SystemZTargetMachine.cpp | 26 CodeGenOpt::Level OL)
27 : LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL),
|
| /external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/ |
| AMDGPUTargetMachine.h | 45 CodeGenOpt::Level OL);
|
| /external/llvm/lib/Target/Hexagon/ |
| HexagonTargetMachine.h | 42 CodeGenOpt::Level OL);
|
| /external/llvm/lib/Target/R600/ |
| AMDGPUTargetMachine.h | 41 CodeModel::Model CM, CodeGenOpt::Level OL);
|
