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      1 //===-- PPCTargetMachine.cpp - Define TargetMachine for PowerPC -----------===//
      2 //
      3 //                     The LLVM Compiler Infrastructure
      4 //
      5 // This file is distributed under the University of Illinois Open Source
      6 // License. See LICENSE.TXT for details.
      7 //
      8 //===----------------------------------------------------------------------===//
      9 //
     10 // Top-level implementation for the PowerPC target.
     11 //
     12 //===----------------------------------------------------------------------===//
     13 
     14 #include "PPCTargetMachine.h"
     15 #include "PPC.h"
     16 #include "llvm/CodeGen/Passes.h"
     17 #include "llvm/MC/MCStreamer.h"
     18 #include "llvm/PassManager.h"
     19 #include "llvm/Support/CommandLine.h"
     20 #include "llvm/Support/FormattedStream.h"
     21 #include "llvm/Support/TargetRegistry.h"
     22 #include "llvm/Target/TargetOptions.h"
     23 using namespace llvm;
     24 
     25 static cl::
     26 opt<bool> DisableCTRLoops("disable-ppc-ctrloops", cl::Hidden,
     27                         cl::desc("Disable CTR loops for PPC"));
     28 
     29 extern "C" void LLVMInitializePowerPCTarget() {
     30   // Register the targets
     31   RegisterTargetMachine<PPC32TargetMachine> A(ThePPC32Target);
     32   RegisterTargetMachine<PPC64TargetMachine> B(ThePPC64Target);
     33   RegisterTargetMachine<PPC64TargetMachine> C(ThePPC64LETarget);
     34 }
     35 
     36 PPCTargetMachine::PPCTargetMachine(const Target &T, StringRef TT,
     37                                    StringRef CPU, StringRef FS,
     38                                    const TargetOptions &Options,
     39                                    Reloc::Model RM, CodeModel::Model CM,
     40                                    CodeGenOpt::Level OL,
     41                                    bool is64Bit)
     42   : LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL),
     43     Subtarget(TT, CPU, FS, is64Bit),
     44     DL(Subtarget.getDataLayoutString()), InstrInfo(*this),
     45     FrameLowering(Subtarget), JITInfo(*this, is64Bit),
     46     TLInfo(*this), TSInfo(*this),
     47     InstrItins(Subtarget.getInstrItineraryData()) {
     48 
     49   // The binutils for the BG/P are too old for CFI.
     50   if (Subtarget.isBGP())
     51     setMCUseCFI(false);
     52   initAsmInfo();
     53 }
     54 
     55 void PPC32TargetMachine::anchor() { }
     56 
     57 PPC32TargetMachine::PPC32TargetMachine(const Target &T, StringRef TT,
     58                                        StringRef CPU, StringRef FS,
     59                                        const TargetOptions &Options,
     60                                        Reloc::Model RM, CodeModel::Model CM,
     61                                        CodeGenOpt::Level OL)
     62   : PPCTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, false) {
     63 }
     64 
     65 void PPC64TargetMachine::anchor() { }
     66 
     67 PPC64TargetMachine::PPC64TargetMachine(const Target &T, StringRef TT,
     68                                        StringRef CPU,  StringRef FS,
     69                                        const TargetOptions &Options,
     70                                        Reloc::Model RM, CodeModel::Model CM,
     71                                        CodeGenOpt::Level OL)
     72   : PPCTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, true) {
     73 }
     74 
     75 
     76 //===----------------------------------------------------------------------===//
     77 // Pass Pipeline Configuration
     78 //===----------------------------------------------------------------------===//
     79 
     80 namespace {
     81 /// PPC Code Generator Pass Configuration Options.
     82 class PPCPassConfig : public TargetPassConfig {
     83 public:
     84   PPCPassConfig(PPCTargetMachine *TM, PassManagerBase &PM)
     85     : TargetPassConfig(TM, PM) {}
     86 
     87   PPCTargetMachine &getPPCTargetMachine() const {
     88     return getTM<PPCTargetMachine>();
     89   }
     90 
     91   const PPCSubtarget &getPPCSubtarget() const {
     92     return *getPPCTargetMachine().getSubtargetImpl();
     93   }
     94 
     95   virtual bool addPreISel();
     96   virtual bool addILPOpts();
     97   virtual bool addInstSelector();
     98   virtual bool addPreSched2();
     99   virtual bool addPreEmitPass();
    100 };
    101 } // namespace
    102 
    103 TargetPassConfig *PPCTargetMachine::createPassConfig(PassManagerBase &PM) {
    104   return new PPCPassConfig(this, PM);
    105 }
    106 
    107 bool PPCPassConfig::addPreISel() {
    108   if (!DisableCTRLoops && getOptLevel() != CodeGenOpt::None)
    109     addPass(createPPCCTRLoops(getPPCTargetMachine()));
    110 
    111   return false;
    112 }
    113 
    114 bool PPCPassConfig::addILPOpts() {
    115   if (getPPCSubtarget().hasISEL()) {
    116     addPass(&EarlyIfConverterID);
    117     return true;
    118   }
    119 
    120   return false;
    121 }
    122 
    123 bool PPCPassConfig::addInstSelector() {
    124   // Install an instruction selector.
    125   addPass(createPPCISelDag(getPPCTargetMachine()));
    126 
    127 #ifndef NDEBUG
    128   if (!DisableCTRLoops && getOptLevel() != CodeGenOpt::None)
    129     addPass(createPPCCTRLoopsVerify());
    130 #endif
    131 
    132   return false;
    133 }
    134 
    135 bool PPCPassConfig::addPreSched2() {
    136   if (getOptLevel() != CodeGenOpt::None)
    137     addPass(&IfConverterID);
    138 
    139   return true;
    140 }
    141 
    142 bool PPCPassConfig::addPreEmitPass() {
    143   if (getOptLevel() != CodeGenOpt::None)
    144     addPass(createPPCEarlyReturnPass());
    145   // Must run branch selection immediately preceding the asm printer.
    146   addPass(createPPCBranchSelectionPass());
    147   return false;
    148 }
    149 
    150 bool PPCTargetMachine::addCodeEmitter(PassManagerBase &PM,
    151                                       JITCodeEmitter &JCE) {
    152   // Inform the subtarget that we are in JIT mode.  FIXME: does this break macho
    153   // writing?
    154   Subtarget.SetJITMode();
    155 
    156   // Machine code emitter pass for PowerPC.
    157   PM.add(createPPCJITCodeEmitterPass(*this, JCE));
    158 
    159   return false;
    160 }
    161 
    162 void PPCTargetMachine::addAnalysisPasses(PassManagerBase &PM) {
    163   // Add first the target-independent BasicTTI pass, then our PPC pass. This
    164   // allows the PPC pass to delegate to the target independent layer when
    165   // appropriate.
    166   PM.add(createBasicTargetTransformInfoPass(this));
    167   PM.add(createPPCTargetTransformInfoPass(this));
    168 }
    169 
    170