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    Searched refs:PhysicalReg_ESP (Results 1 - 10 of 10) sorted by null

  /dalvik/vm/compiler/codegen/x86/
LowerObject.cpp 105 load_effective_addr(-8, PhysicalReg_ESP, true, PhysicalReg_ESP, true);
106 move_reg_to_mem(OpndSize_32, 6, false, 0, PhysicalReg_ESP, true);
107 move_reg_to_mem(OpndSize_32, PhysicalReg_EAX, true, 4, PhysicalReg_ESP, true); //resolved class
111 load_effective_addr(8, PhysicalReg_ESP, true, PhysicalReg_ESP, true);
228 load_effective_addr(-8, PhysicalReg_ESP, true, PhysicalReg_ESP, true);
229 move_reg_to_mem(OpndSize_32, 1, false, 4, PhysicalReg_ESP, true);
230 move_reg_to_mem(OpndSize_32, 3, false, 0, PhysicalReg_ESP, true)
    [all...]
LowerInvoke.cpp 287 load_effective_addr(-16, PhysicalReg_ESP, true, PhysicalReg_ESP, true);
288 move_imm_to_mem(OpndSize_32, tmp, 4, PhysicalReg_ESP, true);
291 move_imm_to_mem(OpndSize_32, (int) currentMethod->clazz->pDvmDex, 12, PhysicalReg_ESP, true);
295 move_imm_to_mem(OpndSize_32, (int) currentMethod, 8, PhysicalReg_ESP, true);
296 move_reg_to_mem(OpndSize_32, 5, false, 0, PhysicalReg_ESP, true);
299 load_effective_addr(16, PhysicalReg_ESP, true, PhysicalReg_ESP, true);
575 load_effective_addr(-8, PhysicalReg_ESP, true, PhysicalReg_ESP, true)
    [all...]
LowerJump.cpp     [all...]
LowerGetPut.cpp 366 load_effective_addr(-12, PhysicalReg_ESP, true, PhysicalReg_ESP, true);
367 move_reg_to_mem(OpndSize_32, 5, false, 0, PhysicalReg_ESP, true);
369 move_reg_to_mem(OpndSize_32, 6, false, 4, PhysicalReg_ESP, true);
373 load_effective_addr(12, PhysicalReg_ESP, true, PhysicalReg_ESP, true);
472 load_effective_addr(-16, PhysicalReg_ESP, true, PhysicalReg_ESP, true);
473 move_reg_to_mem(OpndSize_32, 9, false, 12, PhysicalReg_ESP, true); //field
474 move_reg_to_mem(OpndSize_32, 7, false, 8, PhysicalReg_ESP, true); //objec
    [all...]
LowerAlu.cpp 226 load_effective_addr(-2, PhysicalReg_ESP, true, PhysicalReg_ESP, true);
227 store_fpu_cw(false/*checkException*/, 0, PhysicalReg_ESP, true);
228 alu_binary_imm_mem(OpndSize_16, or_opc, 0xc00, 0, PhysicalReg_ESP, true);
229 load_fpu_cw(0, PhysicalReg_ESP, true);
230 alu_binary_imm_mem(OpndSize_16, xor_opc, 0xc00, 0, PhysicalReg_ESP, true);
233 load_fpu_cw(0, PhysicalReg_ESP, true);
234 load_effective_addr(2, PhysicalReg_ESP, true, PhysicalReg_ESP, true);
310 load_effective_addr(-2, PhysicalReg_ESP, true, PhysicalReg_ESP, true)
    [all...]
LowerHelper.cpp 399 ((reg != PhysicalReg_EDI && reg != PhysicalReg_ESP && reg != PhysicalReg_EBP) || (!isPhysical)) &&
732 base_reg != PhysicalReg_ESP &&
    [all...]
LowerReturn.cpp 101 move_imm_to_mem(OpndSize_32, kCallsiteInterpreted, 0, PhysicalReg_ESP, true);
AnalysisO1.cpp 311 if(k == PhysicalReg_EDI || k == PhysicalReg_ESP || k == PhysicalReg_EBP)
339 if(k == PhysicalReg_EDI || k == PhysicalReg_ESP || k == PhysicalReg_EBP)
603 move_imm_to_mem(OpndSize_32, cUnit->startOffset, -4, PhysicalReg_ESP, true); //2nd argument: offset
604 move_imm_to_mem(OpndSize_32, (int)currentMethod, -8, PhysicalReg_ESP, true); //1st argument: method
605 load_effective_addr(-8, PhysicalReg_ESP, true, PhysicalReg_ESP, true);
612 load_effective_addr(8, PhysicalReg_ESP, true, PhysicalReg_ESP, true);
    [all...]
Lower.cpp 356 move_mem_to_reg(OpndSize_32, 0, PhysicalReg_ESP, true, PhysicalReg_EDX, true);
  /dalvik/vm/compiler/codegen/x86/libenc/
enc_wrapper.h 25 PhysicalReg_EDI, PhysicalReg_ESI, PhysicalReg_ESP, PhysicalReg_EBP,

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