| /external/llvm/test/CodeGen/X86/ |
| crash.ll | 514 %tmp6 = bitcast <4 x float> %tmp to i128
516 %tmp8 = bitcast <4 x float> %tmp7 to i128
523 %tmp11 = phi i128 [ undef, %bb1 ], [ %tmp6, %bb5 ]
524 %tmp12 = phi i128 [ 0, %bb1 ], [ %tmp8, %bb5 ]
549 %tmp19 = bitcast i128 %tmp11 to <4 x float>
550 %tmp20 = bitcast i128 %tmp12 to <4 x float>
|
| /external/llvm/lib/IR/ |
| ValueTypes.cpp | 120 case MVT::i128: return "i128";
186 case MVT::i128: return IntegerType::get(Context, 128);
|
| /external/llvm/lib/Target/AArch64/ |
| AArch64CallingConv.td | 32 // [1 x i64], [2 x i64] or [1 x i128] (if alignment 16 needed).
114 // First we implement C.8 and C.9 (128-bit types get even registers). i128 is
137 // types: this is why a front-end may need to produce i128 for a struct <= 16
|
| /external/clang/test/CodeGen/ |
| arm-arguments.c | 127 // APCS-GNU: define i128 @f25()
129 // APCS-GNU: define i128 @f27()
|
| catch-undef-behavior.c | 256 // CHECK: icmp ule i128 %{{.*}}, -20282409603651670423947251286016
259 // CHECK-TRAP: %[[INBOUNDS:.*]] = icmp ule i128 %{{.*}}, -20282409603651670423947251286016
|
| /external/llvm/include/llvm/CodeGen/ |
| ValueTypes.td | 28 def i128 : ValueType<128, 6>; // 128-bit integer value
|
| ValueTypes.h | 48 i128 = 6, // This is a 128 bit integer value enumerator in enum:llvm::MVT::SimpleValueType
51 LAST_INTEGER_VALUETYPE = i128,
388 case i128:
476 return MVT::i128;
|
| /external/valgrind/main/lackey/docs/ |
| lk-manual.xml | 90 The IR types are identified by their IR name ("I1", "I8", ... "I128",
|
| /external/llvm/lib/Target/PowerPC/ |
| PPCCallingConv.td | 30 CCIfType<[i128], CCAssignToReg<[X3, X4, X5, X6]>>,
|
| /external/llvm/lib/Transforms/InstCombine/ |
| InstCombineShifts.cpp | 61 /// %C = shl i128 %A, 64
62 /// %D = shl i128 %B, 96
63 /// %E = or i128 %C, %D
64 /// %F = lshr i128 %E, 64
|
| /external/llvm/test/DebugInfo/AArch64/ |
| variable-loc.ll | 39 target datalayout = "e-p:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-i128:128:128-f32:32:32-f64:64:64-f128:128:128-n32:64-S128"
|
| /external/llvm/test/Other/ |
| constant-fold-gep.ll | 84 @f = constant i64 ptrtoint (<{ i16, i128 }>* getelementptr ({i1, <{ i16, i128 }>}* null, i64 0, i32 1) to i64)
362 %t = bitcast i64 ptrtoint (<{ i16, i128 }>* getelementptr ({i1, <{ i16, i128 }>}* null, i64 0, i32 1) to i64) to i64
|
| /external/llvm/test/Transforms/SimplifyCFG/ |
| switch_create.ll | 419 define void @test15(i128 %x) nounwind {
420 %cmp = icmp ugt i128 %x, 2
424 %cmp2 = icmp ne i128 %x, 100000000000000000000
|
| /external/llvm/test/CodeGen/Generic/ |
| APIntParam.ll | 129 @i128_s = external global i128 ; <i128*> [#uses=1]
894 define void @i128_ls(i128 %x) nounwind {
895 store i128 %x, i128* @i128_s
[all...] |
| APIntSextParam.ll | 129 @i128_s = external global i128 ; <i128*> [#uses=1]
894 define void @i128_ls(i128 signext %x) nounwind {
895 store i128 %x, i128* @i128_s
[all...] |
| APIntZextParam.ll | 129 @i128_s = external global i128 ; <i128*> [#uses=1]
894 define void @i128_ls(i128 zeroext %x) nounwind {
895 store i128 %x, i128* @i128_s
[all...] |
| APIntLoadStore.ll | 256 @i128_l = external global i128 ; <i128*> [#uses=1]
257 @i128_s = external global i128 ; <i128*> [#uses=1]
[all...] |
| /ndk/sources/cxx-stl/llvm-libc++/libcxx/test/algorithms/alg.sorting/alg.heap.operations/is.heap/ |
| is_heap.pass.cpp | 270 int i128[] = {0, 0, 0, 1, 0, 0, 0}; local
397 assert(std::is_heap(i128, i128+7) == (std::is_heap_until(i128, i128+7) == i128+7));
|
| is_heap_until.pass.cpp | 270 int i128[] = {0, 0, 0, 1, 0, 0, 0}; local
397 assert(std::is_heap_until(i128, i128+7) == i128+3);
|
| is_heap_until_comp.pass.cpp | 271 int i128[] = {0, 0, 0, 1, 0, 0, 0}; local
398 assert(std::is_heap_until(i128, i128+7, std::greater<int>()) == i128+7);
|
| /external/llvm/lib/Target/R600/ |
| SIRegisterInfo.td | 160 def SReg_128 : RegisterClass<"AMDGPU", [v16i8, i128], 128, (add SGPR_128)>;
|
| /external/llvm/lib/Target/SystemZ/ |
| SystemZRegisterInfo.td | 89 // The architecture doesn't really have any i128 support, so model the
|
| /external/llvm/test/CodeGen/ARM/ |
| vldlane.ll | 508 %tmp64 = zext i64 %tmp63 to i128
509 %tmp65 = shl i128 %tmp64, 64
510 %ins67 = or i128 %tmp65, 0
511 %tmp78 = bitcast i128 %ins67 to <8 x i16>
|
| /external/llvm/test/Transforms/MemCpyOpt/ |
| memcpy.ll | 82 %struct.S = type { i128, [4 x i8]}
|
| /external/llvm/test/Instrumentation/MemorySanitizer/ |
| msan_basic.ll | 564 ; CHECK-ORIGINS: = bitcast <8 x i16> {{.*}} to i128
565 ; CHECK-ORIGINS-NEXT: = icmp ne i128 {{.*}}, 0
|
