| /external/llvm/lib/Target/ARM/MCTargetDesc/ |
| ARMFixupKinds.h | 31 // (so it's encoded as an 8-bit immediate).
38 // 8-bit immediate).
103 // It is possible to create an "immediate" that happens to be pcrel.
|
| ARMMCCodeEmitter.cpp | 87 /// getThumbBLTargetOpValue - Return encoding info for Thumb immediate
92 /// getThumbBLXTargetOpValue - Return encoding info for Thumb immediate
109 /// getBranchTargetOpValue - Return encoding info for 24-bit immediate
115 /// immediate Thumb2 direct branch target.
119 /// getARMBranchTargetOpValue - Return encoding info for 24-bit immediate
128 /// getAdrLabelOpValue - Return encoding info for 12-bit immediate
180 /// getShiftOp - Return the shift opcode (bit[6:5]) of the immediate value.
239 /// getSOImmOpValue - Return an encoded 12-bit shifted-immediate value.
255 /// getT2SOImmOpValue - Return an encoded 12-bit shifted-immediate value.
463 // Immediate is always encoded as positive. The 'U' bit controls add vs sub
[all...] |
| /external/llvm/lib/Target/ARM/ |
| Thumb1RegisterInfo.cpp | 62 /// specified immediate.
86 /// a destreg = basereg + immediate in Thumb code. Materialize the immediate
87 /// in a register using mov / mvn sequences or load the immediate from a
166 /// a destreg = basereg + immediate in Thumb code.
227 // This will expand into too many instructions. Load the immediate from a
370 "Thumb add/sub sp, #imm immediate must be multiple of 4!");
403 // simplify the immediate.
515 // ldr/str immediate offsets must be positive, and if we're referencing
620 // If we get here, the immediate doesn't fit into the instruction. We folde
[all...] |
| /external/llvm/test/MC/Disassembler/AArch64/ |
| basic-a64-undefined.txt | 9 # Instructions notionally in the add/sub (immediate) sheet, but with
16 # Instructions notionally in the load/store (unsigned immediate) sheet.
30 # Instructions notionally in the move wide (immediate) sheet, but with out
|
| /external/mesa3d/src/mesa/vbo/ |
| vbo_context.h | 41 * The module captures both immediate mode and display list drawing,
120 * variations of those calls). When we transition from immediate mode
155 * Return if format is integer. The immediate mode commands only emit floats
|
| /external/xmp_toolkit/XMPCore/src/com/adobe/xmp/ |
| XMPIterator.java | 49 * <li>JUST_CHILDREN - Visit just the immediate children of the root. Skip
50 * the root itself and all nodes below the immediate children. This omits the
51 * qualifiers of the immediate children, the qualifier nodes being below what
|
| /system/core/libcorkscrew/arch-mips/ |
| backtrace-mips.c | 106 int32_t immediate = ((((int)op) << 16) >> 16); local
107 if (immediate < 0) {
108 stack_size = -immediate;
|
| /external/chromium_org/v8/src/x64/ |
| builtins-x64.cc | 71 __ addq(rax, Immediate(num_extra_args + 1));
174 __ cmpq(Operand(kScratchRegister, 0), Immediate(0));
221 __ shl(rdi, Immediate(kPointerSizeLog2));
266 __ or_(rbx, Immediate(kHeapObjectTag));
320 __ addq(rcx, Immediate(kPointerSize));
330 __ or_(rdi, Immediate(kHeapObjectTag)); // add the heap tag
548 __ addq(rcx, Immediate(1));
651 __ subq(Operand(rsp, 0), Immediate(5));
715 __ cmpq(r10, Immediate(FullCodeGenerator::NO_REGISTERS));
721 __ cmpq(r10, Immediate(FullCodeGenerator::TOS_REG))
[all...] |
| /external/llvm/lib/Target/AArch64/ |
| AArch64ISelLowering.h | 39 // Indicates a floating-point immediate which fits into the format required
41 // value of that immediate.
119 // Vector move immediate
122 // Vector Move Inverted Immediate
125 // Vector FP move immediate
|
| /art/compiler/dex/quick/x86/ |
| x86_lir.h | 240 // RI - Register Immediate - opcode reg, #immediate
241 // - lir operands - 0: reg, 1: immediate
242 // MI - Memory Immediate - opcode [base + disp], #immediate
243 // - lir operands - 0: base, 1: disp, 2: immediate
244 // AI - Array Immediate - opcode [base + index * scale + disp], #immediate
245 // - lir operands - 0: base, 1: index, 2: scale, 3: disp 4: immediate
391 kShiftRegImm, kShiftMemImm, kShiftArrayImm, // Shift opcode with immediate
[all...] |
| /external/chromium_org/v8/src/ia32/ |
| deoptimizer-ia32.cc | 518 __ sub(esp, Immediate(kDoubleRegsSize));
548 __ mov(Operand(esp, 1 * kPointerSize), Immediate(type())); // Bailout type.
553 Immediate(ExternalReference::isolate_address(isolate())));
587 __ add(esp, Immediate(kDoubleRegsSize + 2 * kPointerSize));
603 __ add(edx, Immediate(sizeof(uint32_t)));
623 Immediate(0));
627 __ cmp(ecx, Immediate(kAlignmentZapValue));
635 Immediate(0));
637 __ push(Immediate(kAlignmentZapValue));
656 __ sub(ecx, Immediate(sizeof(uint32_t)))
[all...] |
| assembler-ia32.cc | 508 void Assembler::push(const Immediate& x) {
554 void Assembler::enter(const Immediate& size) {
615 void Assembler::mov(Register dst, const Immediate& x) {
643 void Assembler::mov(const Operand& dst, const Immediate& x) {
747 emit_arith(2, Operand(dst), Immediate(imm32));
772 void Assembler::add(const Operand& dst, const Immediate& x) {
780 and_(dst, Immediate(imm32));
784 void Assembler::and_(Register dst, const Immediate& x) {
797 void Assembler::and_(const Operand& dst, const Immediate& x) {
838 void Assembler::cmpw(const Operand& op, Immediate imm16)
[all...] |
| ic-ia32.cc | 148 Immediate(PropertyDetails::TypeField::kMask << kSmiTagSize));
206 Immediate(kTypeAndReadOnlyMask));
286 __ cmp(scratch, Immediate(masm->isolate()->factory()->the_hole_value()));
317 __ test(hash, Immediate(Name::kContainsCachedArrayIndexMask));
350 __ test(key, Immediate(0x80000001));
361 __ sub(scratch2, Immediate(Smi::FromInt(2)));
479 Immediate(isolate->factory()->hash_table_map()));
508 __ add(edi, Immediate(kPointerSize * i * 2));
512 __ add(edi, Immediate(kPointerSize));
520 __ add(edi, Immediate(kPointerSize * (kEntriesPerBucket - 1) * 2))
[all...] |
| /external/v8/src/x64/ |
| codegen-x64.cc | 158 __ testb(rax, Immediate(5));
171 __ testl(rax, Immediate(0x400 /* C2 */));
181 __ testb(rax, Immediate(5));
200 __ testb(rax, Immediate(0x3f /* Any Exception*/));
487 __ testb(result, Immediate(kIsIndirectStringMask));
492 __ testb(result, Immediate(kSlicedNotConsMask));
523 __ testb(result, Immediate(kStringRepresentationMask));
531 __ testb(result, Immediate(kIsIndirectStringMask));
536 __ testb(result, Immediate(kShortExternalStringTag));
540 __ testb(result, Immediate(kStringEncodingMask))
[all...] |
| builtins-x64.cc | 71 __ addq(rax, Immediate(num_extra_args + 1));
108 __ cmpq(Operand(kScratchRegister, 0), Immediate(0));
155 __ shl(rdi, Immediate(kPointerSizeLog2));
200 __ or_(rbx, Immediate(kHeapObjectTag));
254 __ addq(rcx, Immediate(kPointerSize));
264 __ or_(rdi, Immediate(kHeapObjectTag)); // add the heap tag
480 __ addq(rcx, Immediate(1));
588 __ cmpq(rcx, Immediate(FullCodeGenerator::NO_REGISTERS));
594 __ cmpq(rcx, Immediate(FullCodeGenerator::TOS_REG));
668 Immediate(1 << SharedFunctionInfo::kStrictModeBitWithinByte))
[all...] |
| /art/compiler/utils/arm/ |
| constants_arm.h | 186 // Immediate instruction fields encoding.
295 // with immediate
305 // with immediate
328 // Field used in 16-bit immediate move instructions
333 // Field used in VFP float immediate move instruction
340 // Field used in VFP double immediate move instruction
354 ((Bit(25) == 1) || // Data processing immediate.
|
| /external/llvm/lib/Target/Mips/ |
| Mips16InstrInfo.td | 84 // Compare a register and immediate and place result in CC
487 // Format: ADDIU rx, immediate MIPS16e
488 // Purpose: Add Immediate Unsigned Word (2-Operand, Extended)
507 // Format: ADDIU rx, pc, immediate MIPS16e
508 // Purpose: Add Immediate Unsigned Word (3-Operand, PC-Relative, Extended)
514 // Format: ADDIU sp, immediate MIPS16e
515 // Purpose: Add Immediate Unsigned Word (2-Operand, SP-Relative, Extended)
584 //Format: BREAK immediate
644 // Format: CMPI rx, immediate MIPS16e
645 // Purpose: Compare Immediate
[all...] |
| /external/llvm/lib/Target/PowerPC/AsmParser/ |
| PPCAsmParser.cpp | 245 Immediate,
289 case Immediate:
311 assert(Kind == Immediate && "Invalid access!");
337 return (unsigned) (Kind == Immediate ? Imm.Val : Expr.CRVal);
342 return (unsigned) (Kind == Immediate ? Imm.Val : Expr.CRVal);
351 bool isImm() const { return Kind == Immediate || Kind == Expression; }
352 bool isU5Imm() const { return Kind == Immediate && isUInt<5>(getImm()); }
353 bool isS5Imm() const { return Kind == Immediate && isInt<5>(getImm()); }
354 bool isU6Imm() const { return Kind == Immediate && isUInt<6>(getImm()); }
356 (Kind == Immediate && isUInt<16>(getImm()));
[all...] |
| /external/llvm/lib/Target/X86/ |
| X86ISelLowering.h | 185 /// BLENDI - Blend where the selector is an immediate.
269 // VSHLI, VSRLI, VSRAI - Vector shift elements by immediate
288 // MUL_IMM - X86 specific multiply by immediate.
468 /// immediate to extract the specified EXTRACT_SUBVECTOR index
473 /// immediate to insert at the specified INSERT_SUBVECTOR index
478 /// immediate to extract the specified EXTRACT_SUBVECTOR index
483 /// immediate to insert at the specified INSERT_SUBVECTOR index
649 /// isLegalICmpImmediate - Return true if the specified immediate is legal
650 /// icmp immediate, that is the target has icmp instructions which can
651 /// compare a register against the immediate without having to materializ
[all...] |
| /external/valgrind/main/VEX/priv/ |
| host_ppc_defs.h | 200 Pam_IR=1, /* Immediate (signed 16-bit) + Reg */
230 /* ("RH" == "Register or Halfword immediate") */
287 /* ("VI" == "Vector Register or Immediate") */
339 Bool /* is the 2nd operand an immediate? */);
352 Bool /* is the 2nd operand an immediate? */,
450 Pin_LI, /* load word (32/64-bit) immediate (fake insn) */
503 Pin_DfpShift, /* Decimal floating point shift by immediate value */
507 * immediate value */
541 - For add, the immediate, if it exists, is a signed 16.
542 - For sub, the immediate, if it exists, is a signed 1
[all...] |
| /external/v8/src/ia32/ |
| assembler-ia32.cc | 517 void Assembler::push(const Immediate& x) {
563 void Assembler::enter(const Immediate& size) {
624 void Assembler::mov(Register dst, const Immediate& x) {
652 void Assembler::mov(const Operand& dst, const Immediate& x) {
756 emit_arith(2, Operand(dst), Immediate(imm32));
781 void Assembler::add(const Operand& dst, const Immediate& x) {
789 and_(dst, Immediate(imm32));
793 void Assembler::and_(Register dst, const Immediate& x) {
806 void Assembler::and_(const Operand& dst, const Immediate& x) {
847 void Assembler::cmpw(const Operand& op, Immediate imm16)
[all...] |
| /external/chromium_org/gpu/command_buffer/common/ |
| cmd_buffer_common.h | 52 // variable sized commands like immediate commands or Noop.
59 // Sets the header by a size in bytes of the immediate data after the command.
96 // used for IMMEDIATE commands to get the address of the place to put the data.
97 // Immediate command put their data direclty in the command buffer.
117 // This can only be used for variable sized command like IMMEDIATE commands.
129 // This can only be used for variable sized command like IMMEDIATE commands.
|
| /external/chromium_org/third_party/mesa/src/src/gallium/auxiliary/tgsi/ |
| tgsi_sanity.c | 446 report_error( ctx, "Instruction expected but immediate found" );
457 if (imm->Immediate.DataType != TGSI_IMM_FLOAT32 &&
458 imm->Immediate.DataType != TGSI_IMM_UINT32 &&
459 imm->Immediate.DataType != TGSI_IMM_INT32) {
460 report_error( ctx, "(%u): Invalid immediate data type", imm->Immediate.DataType );
|
| /external/chromium_org/third_party/mesa/src/src/gallium/drivers/i915/ |
| i915_state_emit.c | 149 i915->current.immediate[I915_IMMEDIATE_S0]);
161 uint32_t imm = i915->current.immediate[i];
171 OUT_BATCH(i915->current.immediate[i]);
394 ? "user" : "immediate"));
557 VALIDATE_ATOM(immediate, I915_HW_IMMEDIATE);
607 EMIT_ATOM(immediate, I915_HW_IMMEDIATE);
|
| /external/clang/lib/Basic/ |
| TargetInfo.cpp | 356 case 'g': // general register, memory operand or immediate integer.
456 case 'i': // immediate integer.
457 case 'n': // immediate integer with a known value.
478 case 'g': // general register, memory operand or immediate integer.
483 case 'E': // immediate floating point.
484 case 'F': // immediate floating point.
|
