| /frameworks/av/media/libstagefright/codecs/on2/h264dec/omxdl/arm_neon/vc/comm/src/ |
| omxVCCOMM_ExpandFrame_I_s.s | 94 VLD1 qData0, [pTop @128]!
97 VLD1 qData1, [pBot @128]!
125 VLD1 qData0, [pTop @64]!
128 VLD1 qData1, [pBot @64]!
160 VLD1 {dData0 []}, [pLeft], iPlaneStep ;// Top-Left corner pixel from frame duplicated in dData0
162 VLD1 {dData1 []}, [pRight], iPlaneStep ;// Top-Right corner pixel from frame duplicated in dData1
190 VLD1 {dData0 []}, [pLeft], iPlaneStep
192 VLD1 {dData1 []}, [pRight], iPlaneStep
|
| /external/libvpx/libvpx/vp8/encoder/arm/neon/ |
| shortfdct_neon.asm | 35 vld1.16 {d0}, [r0@64], r2
37 vld1.16 {d1}, [r0@64], r2
38 vld1.16 {q8}, [r12@128]! ; d16=5352, d17=2217
39 vld1.16 {d2}, [r0@64], r2
40 vld1.32 {q9, q10}, [r12@128]! ; q9=14500, q10=7500
41 vld1.16 {d3}, [r0@64], r2
46 vld1.32 {q11,q12}, [r12@128] ; q11=12000, q12=51000
116 vld1.16 {q0}, [r0@128], r2
118 vld1.16 {q1}, [r0@128], r2
119 vld1.16 {q8}, [r12@128]! ; d16=5352, d17=221
[all...] |
| /external/llvm/test/CodeGen/ARM/ |
| vector-extend-narrow.ll | 23 ; Note: vld1 here is reasonably important. Mixing VFP and NEON
25 ; CHECK: vld1
52 ; Note: vld1 here is reasonably important. Mixing VFP and NEON
54 ; CHECK: vld1
67 ; CHECK: vld1
|
| memcpy-inline.ll | 28 ; CHECK: vld1.8 {d{{[0-9]+}}, d{{[0-9]+}}}, [r1]
32 ; CHECK: vld1.8 {d{{[0-9]+}}, d{{[0-9]+}}}, [r1]
43 ; CHECK: vld1.8 {d{{[0-9]+}}, d{{[0-9]+}}}, [r1]
47 ; CHECK: vld1.8 {d{{[0-9]+}}, d{{[0-9]+}}}, [r1]
56 ; CHECK: vld1.8 {d{{[0-9]+}}, d{{[0-9]+}}}, [r1]
60 ; CHECK: vld1.8 {d{{[0-9]+}}}, [r1]
69 ; CHECK: vld1.8 {[[REG3:d[0-9]+]], [[REG4:d[0-9]+]]}, [r1]
91 ; CHECK: vld1.8 {[[REG8:d[0-9]+]]}, [r0]
95 ; CHECK: vld1.8
106 ; CHECK: vld1.3
[all...] |
| vbsl-constant.ll | 62 ;CHECK: vld1.32
63 ;CHECK: vld1.32
76 ;CHECK: vld1.32
77 ;CHECK: vld1.32
90 ;CHECK: vld1.32
91 ;CHECK: vld1.32
104 ;CHECK: vld1.32
105 ;CHECK: vld1.32
106 ;CHECK: vld1.64
|
| nop_concat_vectors.ll | 4 ;CHECK-NOT: vld1.32
|
| twoaddrinstr.ll | 7 ; CHECK: vld1.32
|
| unaligned_load_store.ll | 34 ; EXPANDED-NOT: vld1
40 ; UNALIGNED: vld1.16
50 ; EXPANDED-NOT: vld1
56 ; UNALIGNED: vld1.8
|
| /frameworks/av/media/libstagefright/codecs/on2/h264dec/omxdl/arm_neon/vc/m4p10/src/ |
| omxVCM4P10_PredictIntraChroma_8x8_s.s | 196 VLD1 {dLeftVal[0]},[pSrcLeft],step ;// pSrcLeft[0*leftStep]
197 VLD1 {dLeftVal[1]},[pTmp],step ;// pSrcLeft[1*leftStep]
198 VLD1 {dLeftVal[2]},[pSrcLeft],step ;// pSrcLeft[2*leftStep]
199 VLD1 {dLeftVal[3]},[pTmp],step ;// pSrcLeft[3*leftStep]
200 VLD1 {dLeftVal[4]},[pSrcLeft],step ;// pSrcLeft[4*leftStep]
201 VLD1 {dLeftVal[5]},[pTmp],step ;// pSrcLeft[5*leftStep]
202 VLD1 {dLeftVal[6]},[pSrcLeft],step ;// pSrcLeft[6*leftStep]
203 VLD1 {dLeftVal[7]},[pTmp] ;// pSrcLeft[7*leftStep]
209 VLD1 dAboveVal,[pSrcAbove] ;// pSrcAbove[0 to 7]
268 VLD1 dAboveVal,[pSrcAbove] ;// pSrcAbove[0 to 7]
[all...] |
| armVCM4P10_InterpolateLuma_HalfHor4x4_unsafe_s.s | 89 VLD1 qSrcA01, [pSrc], srcStep ;// Load A register [a0 a1 a2 a3 ..]
93 ; VLD1 qSrcB01, [pSrc], srcStep ;// Load B register [a0 a1 a2 a3 ..]
101 VLD1 qSrcB01, [pSrc], srcStep ;// Load B register [a0 a1 a2 a3 ..]
102 ; VLD1 qSrcC01, [pSrc], srcStep ;// Load C register [a0 a1 a2 a3 ..]
119 VLD1 qSrcC01, [pSrc], srcStep ;// Load C register [a0 a1 a2 a3 ..]
120 ; VLD1 qSrcD01, [pSrc], srcStep ;// Load D register [a0 a1 a2 a3 ..]
138 VLD1 qSrcD01, [pSrc], srcStep ;// Load D register [a0 a1 a2 a3 ..]
|
| /external/webrtc/src/modules/audio_processing/ns/ |
| nsx_core_neon.c | 343 "vld1.16 d20, [%[ptr_real]]\n\t"
344 "vld1.16 d22, [%[ptr_imag]]\n\t"
345 "vld1.16 d23, [%[ptr_noiseSupFilter]]!\n\t"
353 "vld1.16 d18, [%[ptr_real]]\n\t"
354 "vld1.16 d24, [%[ptr_imag]]\n\t"
355 "vld1.16 d25, [%[ptr_noiseSupFilter]]!\n\t"
405 "vld1.16 d22, [%[ptr_real]]!\n\t"
406 "vld1.16 d23, [%[ptr_imag]]!\n\t"
420 "vld1.16 d22, [%[ptr_real]]!\n\t"
421 "vld1.16 d23, [%[ptr_imag]]!\n\t
[all...] |
| /external/webrtc/src/modules/audio_processing/aecm/ |
| aecm_core_neon.c | 54 __asm__("vld1.16 %P0, [%1, :64]" : "=w"(tmp16x4_0) : "r"(&time_signal[i]));
57 __asm__("vld1.16 %P0, [%1, :64]" : "=w"(tmp16x4_1) : "r"(&WebRtcAecm_kSqrtHanning[i]));
66 __asm__("vld1.16 %P0, [%1, :64]" : "=w"(tmp16x4_0) : "r"(&time_signal[i + PART_LEN]));
69 __asm__("vld1.16 %P0, [%1, :64]" : "=w"(tmp16x4_1) : "r"(&kSqrtHanningReversed[i]));
134 __asm__("vld1.16 %P0, [%1, :64]" : "=w"(tmp16x4_0) : "r"(&fft[i]));
135 __asm__("vld1.16 %P0, [%1, :64]" : "=w"(tmp16x4_1) : "r"(&WebRtcAecm_kSqrtHanning[i]));
146 __asm__("vld1.16 %P0, [%1, :64]" : "=w"(tmp16x4_0) : "r"(&aecm->outBuf[i]));
155 __asm__("vld1.16 %P0, [%1, :64]" : "=w"(tmp16x4_0) : "r"(&fft[PART_LEN + i]));
156 __asm__("vld1.16 %P0, [%1, :64]" : "=w"(tmp16x4_1) : "r"(&kSqrtHanningReversed[i]));
170 __asm__("vld1.16 {d20, d21, d22, d23}, [%0, :256]" :
[all...] |
| /external/llvm/test/Transforms/LoopStrengthReduce/ARM/ |
| ivchain-ARM.ll | 241 %12 = tail call <1 x i64> @llvm.arm.neon.vld1.v1i64(i8* %.05, i32 1) nounwind
243 %14 = tail call <1 x i64> @llvm.arm.neon.vld1.v1i64(i8* %13, i32 1) nounwind
249 %19 = tail call <1 x i64> @llvm.arm.neon.vld1.v1i64(i8* %18, i32 1) nounwind
251 %21 = tail call <1 x i64> @llvm.arm.neon.vld1.v1i64(i8* %20, i32 1) nounwind
257 %26 = tail call <1 x i64> @llvm.arm.neon.vld1.v1i64(i8* %25, i32 1) nounwind
259 %28 = tail call <1 x i64> @llvm.arm.neon.vld1.v1i64(i8* %27, i32 1) nounwind
265 %33 = tail call <1 x i64> @llvm.arm.neon.vld1.v1i64(i8* %32, i32 1) nounwind
267 %35 = tail call <1 x i64> @llvm.arm.neon.vld1.v1i64(i8* %34, i32 1) nounwind
292 declare <1 x i64> @llvm.arm.neon.vld1.v1i64(i8*, i32) nounwind readonly
300 ; A9: vld1.8 {d{{[0-9]+}}}, [[BASE:[r[0-9]+]]], [[INC:r[0-9]]
[all...] |
| /external/libvpx/libvpx/vp8/common/arm/neon/ |
| sixtappredict8x4_neon.asm | 50 vld1.s32 {q14, q15}, [r2] ;load first_pass filter
67 vld1.u8 {q3}, [r0], r1 ;load src data
69 vld1.u8 {q4}, [r0], r1
71 vld1.u8 {q5}, [r0], r1
73 vld1.u8 {q6}, [r0], r1
139 vld1.u8 {q3}, [r0], r1 ;load src data
146 vld1.u8 {q4}, [r0], r1
148 vld1.u8 {q5}, [r0], r1
150 vld1.u8 {q6}, [r0], r1
152 vld1.u8 {q7}, [r0], r
[all...] |
| sixtappredict16x16_neon.asm | 58 vld1.s32 {q14, q15}, [r2] ;load first_pass filter
81 vld1.u8 {d6, d7, d8}, [r0], r1 ;load src data
82 vld1.u8 {d9, d10, d11}, [r0], r1
83 vld1.u8 {d12, d13, d14}, [r0], r1
203 vld1.s32 {q5, q6}, [r3] ;load second_pass filter
219 vld1.u8 {d18}, [lr], r2 ;load src data
220 vld1.u8 {d19}, [lr], r2
221 vld1.u8 {d20}, [lr], r2
222 vld1.u8 {d21}, [lr], r2
224 vld1.u8 {d22}, [lr], r
[all...] |
| loopfiltersimplehorizontaledge_neon.asm | 28 vld1.u8 {q7}, [r0@128], r1 ; q0
29 vld1.u8 {q5}, [r3@128], r1 ; p0
30 vld1.u8 {q8}, [r0@128] ; q1
31 vld1.u8 {q6}, [r3@128] ; p1
|
| /frameworks/av/media/libstagefright/codecs/amrwbenc/src/asm/ARMV7/ |
| Norm_Corr_neon.s | 73 VLD1.S16 {Q0, Q1}, [r14]!
74 VLD1.S16 {Q2, Q3}, [r14]!
75 VLD1.S16 {Q4, Q5}, [r14]!
76 VLD1.S16 {Q6, Q7}, [r14]!
116 VLD1.S16 {Q0, Q1}, [r14]! @ load 16 excf[]
117 VLD1.S16 {Q2, Q3}, [r14]! @ load 16 excf[]
118 VLD1.S16 {Q4, Q5}, [r12]! @ load 16 x[]
119 VLD1.S16 {Q6, Q7}, [r12]! @ load 16 x[]
137 VLD1.S16 {Q0, Q1}, [r14]! @ load 16 excf[]
138 VLD1.S16 {Q2, Q3}, [r14]! @ load 16 excf[
[all...] |
| pred_lt4_1_neon.s | 50 VLD1.S16 {Q0, Q1}, [r11]!
51 VLD1.S16 {Q2, Q3}, [r11]!
55 VLD1.S16 {Q4, Q5}, [r4]! @load 16 x[]
56 VLD1.S16 {Q6, Q7}, [r4]! @load 16 x[]
|
| syn_filt_neon.s | 45 VLD1.S16 {D0, D1, D2, D3}, [r4]! @load 16 mems
53 VLD1.S16 {D0, D1, D2, D3}, [r0]! @ load a[1] ~ a[16]
62 VLD1.S16 {D4, D5, D6, D7}, [r10]! @ first 16 temp_p
96 VLD1.S16 {D0, D1, D2, D3}, [r5]!
|
| /external/llvm/test/CodeGen/Thumb2/ |
| buildvector-crash.ll | 16 ; CHECK: vld1.64
|
| /external/pixman/pixman/ |
| pixman-arm-neon-asm.S | 149 * instruction. It is 1 cycle slower than VLD1.32, so this is not always
214 * vld1.16 {d4, d5}, [DST_R, :128]!
255 vld1.16 {d4, d5}, [DST_R, :128]!
299 vld1.16 {d4, d5}, [DST_R, :128]!
390 vld1.16 {d4, d5}, [DST_R, :128]!
398 vld1.32 {d3[0]}, [DUMMY]
513 vld1.8 {d4, d5, d6, d7}, [DST_R, :128]!
545 vld1.32 {d4, d5, d6, d7}, [DST_R, :128]!
763 vld1.32 {d3[0]}, [DUMMY]
[all...] |
| /bionic/libc/arch-arm/cortex-a9/bionic/ |
| memcpy_base.S | 74 vld1.32 {d0[0]}, [r1]!
78 vld1.8 {d0}, [r1]!
94 vld1.8 {d0 - d3}, [r1]!
95 vld1.8 {d4 - d7}, [r1]!
108 vld1.8 {d0 - d3}, [r1]!
118 vld1.8 {d0, d1}, [r1]!
123 vld1.8 {d0}, [r1]!
126 vld1.32 {d0[0]}, [r1]!
|
| /external/clang/test/CodeGen/ |
| asm_arm.c | 28 // CHECK: call void asm sideeffect "vld1.32 {d8[],d9[]},
30 "vld1.32 {d8[],d9[]}, [%1,:32] \n\t"
|
| /external/libyuv/files/source/ |
| compare_neon.cc | 30 "vld1.u8 {q0}, [%0]! \n"
31 "vld1.u8 {q1}, [%1]! \n"
|
| /bionic/libc/arch-arm/krait/bionic/ |
| memcpy_base.S | 72 vld1.8 {d0}, [r1]!
80 vld1.8 {d0 - d3}, [r1]!
81 vld1.8 {d4 - d7}, [r1]!
93 vld1.8 {d0 - d3}, [r1]!
102 vld1.8 {d0, d1}, [r1]!
108 vld1.8 {d0}, [r1]!
|
