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      1 ; RUN: llc < %s -mtriple=thumbv7-apple-ios -mcpu=cortex-a8 -pre-RA-sched=source -disable-post-ra | FileCheck %s
      2 
      3 %struct.x = type { i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8 }
      4 
      5 @src = external global %struct.x
      6 @dst = external global %struct.x
      7 
      8 @.str1 = private unnamed_addr constant [31 x i8] c"DHRYSTONE PROGRAM, SOME STRING\00", align 1
      9 @.str2 = private unnamed_addr constant [36 x i8] c"DHRYSTONE PROGRAM, SOME STRING BLAH\00", align 1
     10 @.str3 = private unnamed_addr constant [24 x i8] c"DHRYSTONE PROGRAM, SOME\00", align 1
     11 @.str4 = private unnamed_addr constant [18 x i8] c"DHRYSTONE PROGR  \00", align 1
     12 @.str5 = private unnamed_addr constant [7 x i8] c"DHRYST\00", align 1
     13 @.str6 = private unnamed_addr constant [14 x i8] c"/tmp/rmXXXXXX\00", align 1
     14 @spool.splbuf = internal global [512 x i8] zeroinitializer, align 16
     15 
     16 define i32 @t0() {
     17 entry:
     18 ; CHECK-LABEL: t0:
     19 ; CHECK: vldr [[REG1:d[0-9]+]],
     20 ; CHECK: vstr [[REG1]], 
     21   call void @llvm.memcpy.p0i8.p0i8.i32(i8* getelementptr inbounds (%struct.x* @dst, i32 0, i32 0), i8* getelementptr inbounds (%struct.x* @src, i32 0, i32 0), i32 11, i32 8, i1 false)
     22   ret i32 0
     23 }
     24 
     25 define void @t1(i8* nocapture %C) nounwind {
     26 entry:
     27 ; CHECK-LABEL: t1:
     28 ; CHECK: vld1.8 {d{{[0-9]+}}, d{{[0-9]+}}}, [r1]
     29 ; CHECK: vst1.8 {d{{[0-9]+}}, d{{[0-9]+}}}, [r0]
     30 ; CHECK: adds r0, #15
     31 ; CHECK: adds r1, #15
     32 ; CHECK: vld1.8 {d{{[0-9]+}}, d{{[0-9]+}}}, [r1]
     33 ; CHECK: vst1.8 {d{{[0-9]+}}, d{{[0-9]+}}}, [r0]
     34   tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %C, i8* getelementptr inbounds ([31 x i8]* @.str1, i64 0, i64 0), i64 31, i32 1, i1 false)
     35   ret void
     36 }
     37 
     38 define void @t2(i8* nocapture %C) nounwind {
     39 entry:
     40 ; CHECK-LABEL: t2:
     41 ; CHECK: ldr [[REG2:r[0-9]+]], [r1, #32]
     42 ; CHECK: str [[REG2]], [r0, #32]
     43 ; CHECK: vld1.8 {d{{[0-9]+}}, d{{[0-9]+}}}, [r1]
     44 ; CHECK: vst1.8 {d{{[0-9]+}}, d{{[0-9]+}}}, [r0]
     45 ; CHECK: adds r0, #16
     46 ; CHECK: adds r1, #16
     47 ; CHECK: vld1.8 {d{{[0-9]+}}, d{{[0-9]+}}}, [r1]
     48 ; CHECK: vst1.8 {d{{[0-9]+}}, d{{[0-9]+}}}, [r0]
     49   tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %C, i8* getelementptr inbounds ([36 x i8]* @.str2, i64 0, i64 0), i64 36, i32 1, i1 false)
     50   ret void
     51 }
     52 
     53 define void @t3(i8* nocapture %C) nounwind {
     54 entry:
     55 ; CHECK-LABEL: t3:
     56 ; CHECK: vld1.8 {d{{[0-9]+}}, d{{[0-9]+}}}, [r1]
     57 ; CHECK: vst1.8 {d{{[0-9]+}}, d{{[0-9]+}}}, [r0]
     58 ; CHECK: adds r0, #16
     59 ; CHECK: adds r1, #16
     60 ; CHECK: vld1.8 {d{{[0-9]+}}}, [r1]
     61 ; CHECK: vst1.8 {d{{[0-9]+}}}, [r0]
     62   tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %C, i8* getelementptr inbounds ([24 x i8]* @.str3, i64 0, i64 0), i64 24, i32 1, i1 false)
     63   ret void
     64 }
     65 
     66 define void @t4(i8* nocapture %C) nounwind {
     67 entry:
     68 ; CHECK-LABEL: t4:
     69 ; CHECK: vld1.8 {[[REG3:d[0-9]+]], [[REG4:d[0-9]+]]}, [r1]
     70 ; CHECK: vst1.8 {[[REG3]], [[REG4]]}, [r0]
     71   tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %C, i8* getelementptr inbounds ([18 x i8]* @.str4, i64 0, i64 0), i64 18, i32 1, i1 false)
     72   ret void
     73 }
     74 
     75 define void @t5(i8* nocapture %C) nounwind {
     76 entry:
     77 ; CHECK-LABEL: t5:
     78 ; CHECK: movs [[REG5:r[0-9]+]], #0
     79 ; CHECK: strb [[REG5]], [r0, #6]
     80 ; CHECK: movw [[REG6:r[0-9]+]], #21587
     81 ; CHECK: strh [[REG6]], [r0, #4]
     82 ; CHECK: ldr [[REG7:r[0-9]+]], 
     83 ; CHECK: str [[REG7]]
     84   tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %C, i8* getelementptr inbounds ([7 x i8]* @.str5, i64 0, i64 0), i64 7, i32 1, i1 false)
     85   ret void
     86 }
     87 
     88 define void @t6() nounwind {
     89 entry:
     90 ; CHECK-LABEL: t6:
     91 ; CHECK: vld1.8 {[[REG8:d[0-9]+]]}, [r0]
     92 ; CHECK: vstr [[REG8]], [r1]
     93 ; CHECK: adds r1, #6
     94 ; CHECK: adds r0, #6
     95 ; CHECK: vld1.8
     96 ; CHECK: vst1.16
     97   call void @llvm.memcpy.p0i8.p0i8.i64(i8* getelementptr inbounds ([512 x i8]* @spool.splbuf, i64 0, i64 0), i8* getelementptr inbounds ([14 x i8]* @.str6, i64 0, i64 0), i64 14, i32 1, i1 false)
     98   ret void
     99 }
    100 
    101 %struct.Foo = type { i32, i32, i32, i32 }
    102 
    103 define void @t7(%struct.Foo* nocapture %a, %struct.Foo* nocapture %b) nounwind {
    104 entry:
    105 ; CHECK: t7
    106 ; CHECK: vld1.32
    107 ; CHECK: vst1.32
    108   %0 = bitcast %struct.Foo* %a to i8*
    109   %1 = bitcast %struct.Foo* %b to i8*
    110   tail call void @llvm.memcpy.p0i8.p0i8.i32(i8* %0, i8* %1, i32 16, i32 4, i1 false)
    111   ret void
    112 }
    113 
    114 declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture, i32, i32, i1) nounwind
    115 declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture, i64, i32, i1) nounwind
    116