| /external/libvpx/libvpx/vp8/common/arm/neon/ |
| variance_neon.asm | 36 vld1.8 {q0}, [r0], r1 ;Load up source and reference
37 vld1.8 {q2}, [r2], r3
38 vld1.8 {q1}, [r0], r1
39 vld1.8 {q3}, [r2], r3
109 vld1.8 {q0}, [r0], r1 ;Load up source and reference
110 vld1.8 {q2}, [r2], r3
111 vld1.8 {q1}, [r0], r1
112 vld1.8 {q3}, [r2], r3
172 vld1.8 {d0}, [r0], r1 ;Load up source and reference
173 vld1.8 {d4}, [r2], r
[all...] |
| vp8_subpixelvariance16x16s_neon.asm | 43 vld1.u8 {d0, d1, d2, d3}, [r0], r1 ;load src data
44 vld1.8 {q11}, [r2], r3
45 vld1.u8 {d4, d5, d6, d7}, [r0], r1
46 vld1.8 {q12}, [r2], r3
47 vld1.u8 {d8, d9, d10, d11}, [r0], r1
48 vld1.8 {q13}, [r2], r3
49 vld1.u8 {d12, d13, d14, d15}, [r0], r1
61 vld1.8 {q14}, [r2], r3
137 vld1.u8 {q0}, [r0], r1 ;load src data
145 vld1.u8 {q2}, [r0], r
[all...] |
| dequantizeb_neon.asm | 22 vld1.16 {q0, q1}, [r0]
23 vld1.16 {q2, q3}, [r1]
|
| save_reg_neon.asm | 29 vld1.i64 {d8, d9, d10, d11}, [r0]!
30 vld1.i64 {d12, d13, d14, d15}, [r0]!
|
| bilinearpredict4x4_neon.asm | 36 vld1.u8 {d2}, [r0], r1 ;load src data
39 vld1.u8 {d3}, [r0], r1
40 vld1.u32 {d31}, [r2] ;first_pass filter
42 vld1.u8 {d4}, [r0], r1
44 vld1.u8 {d5}, [r0], r1
46 vld1.u8 {d6}, [r0], r1
75 vld1.u32 {d31}, [r3] ;load second_pass filter
106 vld1.32 {d28[0]}, [r0], r1 ;load src data
107 vld1.32 {d28[1]}, [r0], r1
108 vld1.32 {d29[0]}, [r0], r
[all...] |
| bilinearpredict8x4_neon.asm | 38 vld1.u8 {q1}, [r0], r1 ;load src data
39 vld1.u32 {d31}, [r2] ;load first_pass filter
40 vld1.u8 {q2}, [r0], r1
42 vld1.u8 {q3}, [r0], r1
44 vld1.u8 {q4}, [r0], r1
47 vld1.u8 {q5}, [r0], r1
79 vld1.u32 {d31}, [r3] ;load second_pass filter
111 vld1.u8 {d22}, [r0], r1 ;load src data
112 vld1.u8 {d23}, [r0], r1
113 vld1.u8 {d24}, [r0], r
[all...] |
| vp8_subpixelvariance16x16_neon.asm | 47 vld1.s32 {d31}, [r2] ;load first_pass filter
52 vld1.u8 {d2, d3, d4}, [r0], r1 ;load src data
54 vld1.u8 {d5, d6, d7}, [r0], r1
57 vld1.u8 {d8, d9, d10}, [r0], r1
60 vld1.u8 {d11, d12, d13}, [r0], r1
109 vld1.u8 {d2, d3, d4}, [r0], r1 ;load src data
111 vld1.u8 {d5, d6, d7}, [r0], r1
114 vld1.u8 {d8, d9, d10}, [r0], r1
116 vld1.u8 {d11, d12, d13}, [r0], r1
121 vld1.u8 {d14, d15, d16}, [r0], r
[all...] |
| dequant_idct_neon.asm | 26 vld1.16 {q3, q4}, [r0]
27 vld1.16 {q5, q6}, [r1]
32 vld1.32 {d14[0]}, [r2], r3
33 vld1.32 {d14[1]}, [r1], r3
34 vld1.32 {d15[0]}, [r2]
35 vld1.32 {d15[1]}, [r1]
43 vld1.16 {d0}, [r12]
|
| bilinearpredict16x16_neon.asm | 39 vld1.s32 {d31}, [r2] ;load first_pass filter
44 vld1.u8 {d2, d3, d4}, [r0], r1 ;load src data
46 vld1.u8 {d5, d6, d7}, [r0], r1
49 vld1.u8 {d8, d9, d10}, [r0], r1
52 vld1.u8 {d11, d12, d13}, [r0], r1
101 vld1.u8 {d2, d3, d4}, [r0], r1 ;load src data
103 vld1.u8 {d5, d6, d7}, [r0], r1
106 vld1.u8 {d8, d9, d10}, [r0], r1
108 vld1.u8 {d11, d12, d13}, [r0], r1
113 vld1.u8 {d14, d15, d16}, [r0], r
[all...] |
| /external/speex/libspeex/ |
| resample_neon.h | 63 " vld1.16 {d16}, [%[a]]!\n"
64 " vld1.16 {d20}, [%[b]]!\n"
70 " vld1.16 {d16, d17, d18, d19}, [%[a]]!\n"
71 " vld1.16 {d20, d21, d22, d23}, [%[b]]!\n"
79 " vld1.16 {d16, d17, d18, d19}, [%[a]]!\n"
80 " vld1.16 {d20, d21, d22, d23}, [%[b]]!\n"
91 " vld1.16 {d16}, [%[a]]!\n"
92 " vld1.16 {d20}, [%[b]]!\n"
136 " vld1.32 {q4}, [%[a]]!\n"
137 " vld1.32 {q8}, [%[b]]!\n
[all...] |
| /frameworks/av/media/libstagefright/codecs/amrwbenc/src/asm/ARMV7/ |
| Dot_p_neon.s | 39 VLD1.S16 {Q0, Q1}, [r0]! @load 16 Word16 x[]
40 VLD1.S16 {Q2, Q3}, [r0]! @load 16 Word16 x[]
41 VLD1.S16 {Q4, Q5}, [r0]! @load 16 Word16 x[]
42 VLD1.S16 {Q6, Q7}, [r0]! @load 16 Word16 x[]
43 VLD1.S16 {Q8, Q9}, [r1]! @load 16 Word16 y[]
44 VLD1.S16 {Q10, Q11}, [r1]! @load 16 Word16 y[]
45 VLD1.S16 {Q12, Q13}, [r1]! @load 16 Word16 y[]
51 VLD1.S16 {Q0, Q1}, [r1]! @load 16 Word16 y[]
67 VLD1.S16 {Q0, Q1}, [r0]! @load 16 Word16 x[]
68 VLD1.S16 {Q2, Q3}, [r1]
[all...] |
| /external/llvm/test/MC/ARM/ |
| neont2-vld-encoding.s | 5 @ CHECK: vld1.8 {d16}, [r0:64] @ encoding: [0x60,0xf9,0x1f,0x07]
6 vld1.8 {d16}, [r0:64]
7 @ CHECK: vld1.16 {d16}, [r0] @ encoding: [0x60,0xf9,0x4f,0x07]
8 vld1.16 {d16}, [r0]
9 @ CHECK: vld1.32 {d16}, [r0] @ encoding: [0x60,0xf9,0x8f,0x07]
10 vld1.32 {d16}, [r0]
11 @ CHECK: vld1.64 {d16}, [r0] @ encoding: [0x60,0xf9,0xcf,0x07]
12 vld1.64 {d16}, [r0]
13 @ CHECK: vld1.8 {d16, d17}, [r0:64] @ encoding: [0x60,0xf9,0x1f,0x0a]
14 vld1.8 {d16, d17}, [r0:64
[all...] |
| /external/libvpx/libvpx/vp9/common/arm/neon/ |
| vp9_dc_only_idct_add_neon.asm | 50 vld1.32 {d2[0]}, [r1], r3
51 vld1.32 {d2[1]}, [r1], r3
52 vld1.32 {d4[0]}, [r1], r3
53 vld1.32 {d4[1]}, [r1]
|
| vp9_short_idct4x4_1_add_neon.asm | 49 vld1.32 {d2[0]}, [r1], r2
50 vld1.32 {d2[1]}, [r1], r2
51 vld1.32 {d4[0]}, [r1], r2
52 vld1.32 {d4[1]}, [r1]
|
| vp9_loopfilter_neon.asm | 40 vld1.8 {d0[]}, [r2] ; duplicate *blimit
48 vld1.8 {d1[]}, [r3] ; duplicate *limit
49 vld1.8 {d2[]}, [r2] ; duplicate *thresh
55 vld1.u8 {d3}, [r2@64], r1 ; p3
56 vld1.u8 {d4}, [r3@64], r1 ; p2
57 vld1.u8 {d5}, [r2@64], r1 ; p1
58 vld1.u8 {d6}, [r3@64], r1 ; p0
59 vld1.u8 {d7}, [r2@64], r1 ; q0
60 vld1.u8 {d16}, [r3@64], r1 ; q1
61 vld1.u8 {d17}, [r2@64] ; q
[all...] |
| /external/llvm/test/CodeGen/ARM/ |
| 2010-06-29-PartialRedefFastAlloc.ll | 13 ; CHECK: vld1.64 {d16, d17}, [r{{.}}]
14 ; CHECK-NOT: vld1.64 {d16, d17}
19 %0 = call <2 x i64> @llvm.arm.neon.vld1.v2i64(i8* %arg, i32 1)
25 declare <2 x i64> @llvm.arm.neon.vld1.v2i64(i8*, i32) nounwind readonly
|
| spill-q.ll | 10 declare <4 x float> @llvm.arm.neon.vld1.v4f32(i8*, i32) nounwind readonly
16 ; CHECK: vld1.64 {{.*}}sp:128
21 %0 = call <4 x float> @llvm.arm.neon.vld1.v4f32(i8* %vecptr, i32 1) nounwind ; <<4 x float>> [#uses=1]
23 %1 = call <4 x float> @llvm.arm.neon.vld1.v4f32(i8* undef, i32 1) nounwind ; <<4 x float>> [#uses=1]
25 %2 = call <4 x float> @llvm.arm.neon.vld1.v4f32(i8* undef, i32 1) nounwind ; <<4 x float>> [#uses=1]
26 %ld3 = call <4 x float> @llvm.arm.neon.vld1.v4f32(i8* undef, i32 1) nounwind
28 %ld4 = call <4 x float> @llvm.arm.neon.vld1.v4f32(i8* undef, i32 1) nounwind
30 %ld5 = call <4 x float> @llvm.arm.neon.vld1.v4f32(i8* undef, i32 1) nounwind
32 %ld6 = call <4 x float> @llvm.arm.neon.vld1.v4f32(i8* undef, i32 1) nounwind
34 %ld7 = call <4 x float> @llvm.arm.neon.vld1.v4f32(i8* undef, i32 1) nounwin
[all...] |
| /external/clang/test/CodeGen/ |
| arm-neon-misc.c | 17 // CHECK: call <2 x i64> @llvm.arm.neon.vld1.v2i64
27 // CHECK: call <2 x i64> @llvm.arm.neon.vld1.v2i64
30 // CHECK: call <1 x i64> @llvm.arm.neon.vld1.v1i64
|
| /frameworks/av/media/libstagefright/codecs/on2/h264dec/omxdl/arm_neon/vc/m4p10/src/ |
| omxVCM4P10_FilterDeblockingChroma_VerEdge_I_s.s | 115 VLD1 {dAlpha[]}, [pAlpha]!
117 VLD1 {dBeta[]}, [pBeta]!
145 VLD1 dRow0, [pSrcDst], step
147 VLD1 dRow1, [pTmp], step
148 VLD1 dRow2, [pSrcDst], step
149 VLD1 dRow3, [pTmp], step
150 VLD1 dRow4, [pSrcDst], step
151 VLD1 dRow5, [pTmp], step
152 VLD1 dRow6, [pSrcDst], step
153 VLD1 dRow7, [pTmp], ste
[all...] |
| omxVCM4P10_FilterDeblockingLuma_HorEdge_I_s.s | 161 VLD1 {dAlpha[]}, [pAlpha_0]
163 VLD1 {dBeta[]}, [pBeta_0]
189 VLD1 dP_3, [pSrcDst], step
190 VLD1 dP_2, [pTmp], step
191 VLD1 dP_1, [pSrcDst], step
192 VLD1 dP_0, [pTmp], step
193 VLD1 dQ_0, [pSrcDst], step
195 VLD1 dQ_1, [pTmp]
197 VLD1 dQ_2, [pSrcDst], srcdstStep
216 VLD1 dQ_3, [pSrcDst
[all...] |
| omxVCM4P10_FilterDeblockingLuma_VerEdge_I_s.s | 207 VLD1 {dAlpha[]}, [pAlpha_0]
209 VLD1 {dBeta[]}, [pBeta_0]
237 VLD1 dRow0, [pSrcDst], pTmpStep
238 VLD1 dRow1, [pTmp], pTmpStep
239 VLD1 dRow2, [pSrcDst], pTmpStep
241 VLD1 dRow3, [pTmp], pTmpStep
242 VLD1 dRow4, [pSrcDst], pTmpStep
244 VLD1 dRow5, [pTmp], pTmpStep
245 VLD1 dRow6, [pSrcDst], pTmpStep
246 VLD1 dRow7, [pTmp], pTmpSte
[all...] |
| /frameworks/av/media/libstagefright/codecs/on2/h264dec/source/arm_neon_asm/ |
| h264bsdWriteMacroblock.s | 100 VLD1 {qRow0, qRow1}, [data]!
102 VLD1 {qRow2, qRow3}, [data]!
105 VLD1 {qRow4, qRow5}, [data]!
107 VLD1 {qRow6, qRow7}, [data]!
109 VLD1 {qRow8, qRow9}, [data]!
111 VLD1 {qRow10, qRow11}, [data]!
113 VLD1 {qRow12, qRow13}, [data]!
115 VLD1 {qRow14, qRow15}, [data]!
118 VLD1 {qRow0, qRow1}, [data]! ;cb rows 0,1,2,3
120 VLD1 {qRow2, qRow3}, [data]! ;cb rows 4,5,6,
[all...] |
| /frameworks/av/media/libstagefright/codecs/on2/h264dec/source/arm_neon_asm_gcc/ |
| h264bsdWriteMacroblock.S | 102 VLD1 {qRow0, qRow1}, [data]!
104 VLD1 {qRow2, qRow3}, [data]!
107 VLD1 {qRow4, qRow5}, [data]!
109 VLD1 {qRow6, qRow7}, [data]!
111 VLD1 {qRow8, qRow9}, [data]!
113 VLD1 {qRow10, qRow11}, [data]!
115 VLD1 {qRow12, qRow13}, [data]!
117 VLD1 {qRow14, qRow15}, [data]!
120 VLD1 {qRow0, qRow1}, [data]! ;//cb rows 0,1,2,3
122 VLD1 {qRow2, qRow3}, [data]! ;//cb rows 4,5,6,
[all...] |
| /external/llvm/test/CodeGen/Thumb2/ |
| thumb2-spill-q.ll | 10 declare <4 x float> @llvm.arm.neon.vld1.v4f32(i8*, i32) nounwind readonly
16 ; CHECK: vld1.64 {{.*}}[{{.*}}:128]
21 %0 = call <4 x float> @llvm.arm.neon.vld1.v4f32(i8* %vecptr, i32 1) nounwind
23 %1 = call <4 x float> @llvm.arm.neon.vld1.v4f32(i8* undef, i32 1) nounwind ; <<4 x float>> [#uses=1]
25 %2 = call <4 x float> @llvm.arm.neon.vld1.v4f32(i8* undef, i32 1) nounwind ; <<4 x float>> [#uses=1]
26 %ld3 = call <4 x float> @llvm.arm.neon.vld1.v4f32(i8* undef, i32 1) nounwind
28 %ld4 = call <4 x float> @llvm.arm.neon.vld1.v4f32(i8* undef, i32 1) nounwind
30 %ld5 = call <4 x float> @llvm.arm.neon.vld1.v4f32(i8* undef, i32 1) nounwind
32 %ld6 = call <4 x float> @llvm.arm.neon.vld1.v4f32(i8* undef, i32 1) nounwind
34 %ld7 = call <4 x float> @llvm.arm.neon.vld1.v4f32(i8* undef, i32 1) nounwin
[all...] |
| /external/llvm/test/Analysis/BasicAA/ |
| intrinsics.ll | 10 ; CHECK-NEXT: %a = call <8 x i16> @llvm.arm.neon.vld1.v8i16(i8* %p, i32 16) [[ATTR:#[0-9]+]]
15 %a = call <8 x i16> @llvm.arm.neon.vld1.v8i16(i8* %p, i32 16) nounwind
17 %b = call <8 x i16> @llvm.arm.neon.vld1.v8i16(i8* %p, i32 16) nounwind
25 ; CHECK-NEXT: %a = call <8 x i16> @llvm.arm.neon.vld1.v8i16(i8* %p, i32 16) [[ATTR]]
31 %a = call <8 x i16> @llvm.arm.neon.vld1.v8i16(i8* %p, i32 16) nounwind
33 %b = call <8 x i16> @llvm.arm.neon.vld1.v8i16(i8* %p, i32 16) nounwind
38 declare <8 x i16> @llvm.arm.neon.vld1.v8i16(i8*, i32) nounwind readonly
|
