| /art/compiler/dex/quick/mips/ |
| int_mips.cc | 64 LIR* MipsMir2Lir::OpCmpBranch(ConditionCode cond, int src1, int src2,
116 branch = NewLIR2(br_op, src1, src2);
120 NewLIR3(slt_op, t_reg, src2, src1);
122 NewLIR3(slt_op, t_reg, src1, src2);
|
| /art/compiler/dex/ |
| ssa_transformation.cc | 436 * Perform dest U= src1 ^ ~src2
439 void MIRGraph::ComputeSuccLineIn(ArenaBitVector* dest, const ArenaBitVector* src1,
441 if (dest->GetStorageSize() != src1->GetStorageSize() ||
443 dest->IsExpandable() != src1->IsExpandable() ||
450 dest->GetRawStorage()[idx] |= src1->GetRawStorageWord(idx) & ~(src2->GetRawStorageWord(idx));
|
| /dalvik/vm/compiler/ |
| SSATransformation.cpp | 358 * Perform dest U= src1 ^ ~src2
362 const BitVector *src1,
365 if (dest->storageSize != src1->storageSize ||
367 dest->expandable != src1->expandable ||
375 dest->storage[idx] |= src1->storage[idx] & ~src2->storage[idx];
|
| /external/chromium_org/third_party/mesa/src/src/mesa/drivers/dri/r200/ |
| r200_vertprog.h | 9 uint32_t src1; member in struct:__anon15219
|
| /external/chromium_org/v8/src/ia32/ |
| lithium-gap-resolver-ia32.cc | 395 Operand src1 = cgen_->HighOperand(source); local
400 __ mov(tmp, src1);
499 Operand src1 = cgen_->HighOperand(source); local
505 __ mov(tmp, src1);
|
| /external/mesa3d/src/mesa/drivers/dri/r200/ |
| r200_vertprog.h | 9 uint32_t src1; member in struct:__anon25584
|
| /external/chromium_org/third_party/mesa/src/src/mesa/program/ |
| program_parse.y | 83 const struct asm_src_register *src1, const struct asm_src_register *src2);
87 const struct asm_src_register *src1, const struct asm_src_register *src2);
91 const struct asm_src_register *src0, const struct asm_src_register *src1,
[all...] |
| /external/mesa3d/src/mesa/program/ |
| program_parse.y | 83 const struct asm_src_register *src1, const struct asm_src_register *src2);
87 const struct asm_src_register *src1, const struct asm_src_register *src2);
91 const struct asm_src_register *src0, const struct asm_src_register *src1,
[all...] |
| /external/llvm/lib/Target/R600/ |
| R600ExpandSpecialInstrs.cpp | 82 AMDGPU::ZERO); // src1
198 unsigned Src1 = BMI->getOperand(
199 TII->getOperandIdx(Opcode, AMDGPU::OpName::src1))
202 (void) Src1;
204 (TRI.getEncodingValue(Src1) & 0xff) < 127)
205 assert(TRI.getHWRegChan(Src0) == TRI.getHWRegChan(Src1));
249 unsigned Src1 = 0;
253 int Src1Idx = TII->getOperandIdx(MI, AMDGPU::OpName::src1);
255 Src1 = MI.getOperand(Src1Idx).getReg();
261 Src1 = TRI.getSubReg(Src1, SubRegIndex)
[all...] |
| /art/compiler/dex/quick/ |
| mir_to_lir.h | 118 int operands[5]; // [0..4] = [dest, src1, src2, extra, extra2].
266 LIR* NewLIR2(int opcode, int dest, int src1);
267 LIR* NewLIR3(int opcode, int dest, int src1, int src2);
268 LIR* NewLIR4(int opcode, int dest, int src1, int src2, int info);
269 LIR* NewLIR5(int opcode, int dest, int src1, int src2, int info1, int info2);
279 bool EvaluateBranch(Instruction::Code opcode, int src1, int src2);
[all...] |
| /external/chromium_org/v8/src/arm/ |
| macro-assembler-arm.cc | 254 void MacroAssembler::And(Register dst, Register src1, const Operand& src2,
264 ubfx(dst, src1, 0,
267 and_(dst, src1, src2, LeaveCC, cond);
272 void MacroAssembler::Ubfx(Register dst, Register src1, int lsb, int width,
277 and_(dst, src1, Operand(mask), LeaveCC, cond);
282 ubfx(dst, src1, lsb, width, cond);
287 void MacroAssembler::Sbfx(Register dst, Register src1, int lsb, int width,
292 and_(dst, src1, Operand(mask), LeaveCC, cond);
302 sbfx(dst, src1, lsb, width, cond);
695 void MacroAssembler::Strd(Register src1, Register src2
[all...] |
| /external/v8/src/arm/ |
| macro-assembler-arm.cc | 276 void MacroAssembler::And(Register dst, Register src1, const Operand& src2,
287 ubfx(dst, src1, 0,
291 and_(dst, src1, src2, LeaveCC, cond);
296 void MacroAssembler::Ubfx(Register dst, Register src1, int lsb, int width,
301 and_(dst, src1, Operand(mask), LeaveCC, cond);
306 ubfx(dst, src1, lsb, width, cond);
311 void MacroAssembler::Sbfx(Register dst, Register src1, int lsb, int width,
316 and_(dst, src1, Operand(mask), LeaveCC, cond);
326 sbfx(dst, src1, lsb, width, cond);
705 void MacroAssembler::Strd(Register src1, Register src2
[all...] |
| /external/chromium_org/third_party/mesa/src/src/gallium/drivers/r300/compiler/ |
| radeon_program_alu.c | 279 struct rc_src_register src1 = inst->U.I.SrcReg[1]; local
283 src1.Negate &= ~(RC_MASK_Z | RC_MASK_W);
284 src1.Swizzle &= ~(63 << (3 * 2));
285 src1.Swizzle |= (RC_SWIZZLE_ZERO << (3 * 2)) | (RC_SWIZZLE_ZERO << (3 * 3));
286 emit2(c, inst->Prev, RC_OPCODE_DP3, &inst->U.I, inst->U.I.DstReg, src0, src1);
302 * [1, src0.y*src1.y, src0.z, src1.w]
708 * CMP is defined as dst = src0 < 0.0 ? src1 : src2
714 * LRP dst, tmp0, src1, src2
724 /* LRP dst, tmp0, src1, src2 *
745 struct rc_src_register src1 = inst->U.I.SrcReg[1]; local
[all...] |
| /external/chromium_org/third_party/mesa/src/src/mesa/drivers/dri/i965/ |
| brw_wm_emit.c | 470 struct brw_reg src0, src1; local
483 src1 = brw_reg(arg0[i].file, arg0[i].nr, 0,
496 src1 = brw_reg(arg0[i].file, arg0[i].nr, 2,
504 brw_ADD(p, dst[i], src1, negate(src0));
506 brw_ADD(p, dst[i], src0, negate(src1));
963 struct brw_reg src1 = arg1[0]; local
982 brw_MOV(p, temp, src1);
983 src1 = temp;
992 src1);
999 sechalf(src1));
[all...] |
| brw_eu.h | 839 struct brw_reg src1);
845 struct brw_reg src1, \
994 struct brw_reg src1);
1035 struct brw_reg src0, struct brw_reg src1);
1067 struct brw_reg src1);
|
| /external/mesa3d/src/gallium/drivers/r300/compiler/ |
| radeon_program_alu.c | 279 struct rc_src_register src1 = inst->U.I.SrcReg[1]; local
283 src1.Negate &= ~(RC_MASK_Z | RC_MASK_W);
284 src1.Swizzle &= ~(63 << (3 * 2));
285 src1.Swizzle |= (RC_SWIZZLE_ZERO << (3 * 2)) | (RC_SWIZZLE_ZERO << (3 * 3));
286 emit2(c, inst->Prev, RC_OPCODE_DP3, &inst->U.I, inst->U.I.DstReg, src0, src1);
302 * [1, src0.y*src1.y, src0.z, src1.w]
708 * CMP is defined as dst = src0 < 0.0 ? src1 : src2
714 * LRP dst, tmp0, src1, src2
724 /* LRP dst, tmp0, src1, src2 *
745 struct rc_src_register src1 = inst->U.I.SrcReg[1]; local
[all...] |
| /external/mesa3d/src/mesa/drivers/dri/i965/ |
| brw_wm_emit.c | 470 struct brw_reg src0, src1; local
483 src1 = brw_reg(arg0[i].file, arg0[i].nr, 0,
496 src1 = brw_reg(arg0[i].file, arg0[i].nr, 2,
504 brw_ADD(p, dst[i], src1, negate(src0));
506 brw_ADD(p, dst[i], src0, negate(src1));
963 struct brw_reg src1 = arg1[0]; local
982 brw_MOV(p, temp, src1);
983 src1 = temp;
992 src1);
999 sechalf(src1));
[all...] |
| brw_eu.h | 839 struct brw_reg src1);
845 struct brw_reg src1, \
994 struct brw_reg src1);
1035 struct brw_reg src0, struct brw_reg src1);
1067 struct brw_reg src1);
|
| /external/opencv/cv/src/ |
| cvsmooth.cpp | 826 const uchar* src1 = src0 + src_step;
827 const uchar* src2 = src1 + src_step;
829 src0 = src1;
831 src2 = src1;
840 int p3 = src1[x0], p4 = src1[x1], p5 = src1[x2];
859 int p3 = src1[x-cn], p4 = src1[x], p5 = src1[x+cn]
[all...] |
| _cvipp.h | 111 ( const arrtype* src1, int srcstep1, const arrtype* src2, int srcstep2, \
128 ( const arrtype* src1, int srcstep1, const arrtype* src2, int srcstep2, \
145 ( const arrtype* src1, int srcstep1, const arrtype* src2, int srcstep2, \
619 ( const uchar* src1, int srcstep1, uchar scalar,
623 ( const uchar* src1, int srcstep1, uchar scalar,
[all...] |
| /external/chromium_org/third_party/mesa/src/src/gallium/drivers/nv50/codegen/ |
| nv50_ir_lowering_nv50.cpp | 800 Value *src1 = bld.getSSA(); local
813 bld.mkMov(src1, v1)->setPredicate(CC_EQ, pred);
814 bld.mkOp2(OP_UNION, i->dType, i->getDef(0), src0, src1);
831 Value *src1 = bld.getSSA(); local
841 bld.mkMov(src1, v1)->setPredicate(CC_EQ, i->getSrc(2));
842 bld.mkOp2(OP_UNION, i->dType, i->getDef(0), src0, src1);
|
| /external/mesa3d/src/gallium/drivers/nv50/codegen/ |
| nv50_ir_lowering_nv50.cpp | 800 Value *src1 = bld.getSSA(); local
813 bld.mkMov(src1, v1)->setPredicate(CC_EQ, pred);
814 bld.mkOp2(OP_UNION, i->dType, i->getDef(0), src0, src1);
831 Value *src1 = bld.getSSA(); local
841 bld.mkMov(src1, v1)->setPredicate(CC_EQ, i->getSrc(2));
842 bld.mkOp2(OP_UNION, i->dType, i->getDef(0), src0, src1);
|
| /external/opencv/cv/include/ |
| cvcompat.h | 363 #define cvmAdd( src1, src2, dst ) cvAdd( src1, src2, dst, 0 )
364 #define cvmSub( src1, src2, dst ) cvSub( src1, src2, dst, 0 )
366 #define cvmMul( src1, src2, dst ) cvMatMulAdd( src1, src2, 0, dst )
[all...] |
| /external/v8/src/ia32/ |
| lithium-gap-resolver-ia32.cc | 440 Operand src1 = cgen_->HighOperand(source); local
446 __ mov(tmp, src1);
|
| /external/chromium_org/third_party/mesa/src/src/mesa/state_tracker/ |
| st_glsl_to_tgsi.cpp | 374 st_dst_reg dst, st_src_reg src0, st_src_reg src1);
378 st_src_reg src0, st_src_reg src1, st_src_reg src2);
382 st_src_reg src0, st_src_reg src1);
390 st_src_reg src1,
397 st_dst_reg dst, st_src_reg src0, st_src_reg src1);
491 st_src_reg src0, st_src_reg src1, st_src_reg src2)
496 op = get_opcode(ir, op, dst, src0, src1);
504 num_reladdr += src1.reladdr != NULL;
508 reladdr_to_temp(ir, &src1, &num_reladdr);
520 inst->src[1] = src1;
718 st_src_reg src1 = orig_src1; local
[all...] |
