| /external/libvpx/libvpx/vp8/common/arm/neon/ |
| sad8_neon.asm | 28 vld1.8 {d0}, [r0], r1
29 vld1.8 {d8}, [r2], r3
31 vld1.8 {d2}, [r0], r1
32 vld1.8 {d10}, [r2], r3
36 vld1.8 {d4}, [r0], r1
37 vld1.8 {d12}, [r2], r3
41 vld1.8 {d6}, [r0], r1
42 vld1.8 {d14}, [r2], r3
46 vld1.8 {d0}, [r0], r1
47 vld1.8 {d8}, [r2], r
[all...] |
| sad16_neon.asm | 27 vld1.8 {q0}, [r0], r1
28 vld1.8 {q4}, [r2], r3
30 vld1.8 {q1}, [r0], r1
31 vld1.8 {q5}, [r2], r3
36 vld1.8 {q2}, [r0], r1
37 vld1.8 {q6}, [r2], r3
42 vld1.8 {q3}, [r0], r1
43 vld1.8 {q7}, [r2], r3
49 vld1.8 {q0}, [r0], r1
50 vld1.8 {q4}, [r2], r
[all...] |
| copymem16x16_neon.asm | 22 vld1.u8 {q0}, [r0], r1
23 vld1.u8 {q1}, [r0], r1
24 vld1.u8 {q2}, [r0], r1
26 vld1.u8 {q3}, [r0], r1
28 vld1.u8 {q4}, [r0], r1
30 vld1.u8 {q5}, [r0], r1
32 vld1.u8 {q6}, [r0], r1
34 vld1.u8 {q7}, [r0], r1
36 vld1.u8 {q8}, [r0], r1
38 vld1.u8 {q9}, [r0], r
[all...] |
| copymem8x8_neon.asm | 22 vld1.u8 {d0}, [r0], r1
23 vld1.u8 {d1}, [r0], r1
25 vld1.u8 {d2}, [r0], r1
27 vld1.u8 {d3}, [r0], r1
29 vld1.u8 {d4}, [r0], r1
31 vld1.u8 {d5}, [r0], r1
33 vld1.u8 {d6}, [r0], r1
35 vld1.u8 {d7}, [r0], r1
|
| /external/libvpx/libvpx/vp8/encoder/arm/neon/ |
| subtract_neon.asm | 36 vld1.8 {d0}, [r3], r6 ;load src
37 vld1.8 {d1}, [r7], r2 ;load pred
38 vld1.8 {d2}, [r3], r6
39 vld1.8 {d3}, [r7], r2
40 vld1.8 {d4}, [r3], r6
41 vld1.8 {d5}, [r7], r2
42 vld1.8 {d6}, [r3], r6
43 vld1.8 {d7}, [r7], r2
74 vld1.8 {q0}, [r1], r2 ;load src
75 vld1.8 {q1}, [r3], r4 ;load pre
[all...] |
| /external/llvm/test/CodeGen/ARM/ |
| 2012-08-30-select.ll | 10 %vld1 = call <16 x i8> @llvm.arm.neon.vld1.v16i8(i8* %bar, i32 1)
13 %vld1. = select i1 %tobool, <16 x i8> %vld1, <16 x i8> zeroinitializer
14 ret <16 x i8> %vld1.
17 declare <16 x i8> @llvm.arm.neon.vld1.v16i8(i8* , i32 )
|
| vld1.ll | 7 ;CHECK: vld1.8 {d16}, [r0:64]
8 %tmp1 = call <8 x i8> @llvm.arm.neon.vld1.v8i8(i8* %A, i32 16)
14 ;CHECK: vld1.16
16 %tmp1 = call <4 x i16> @llvm.arm.neon.vld1.v4i16(i8* %tmp0, i32 1)
23 ;CHECK: vld1.16 {d16}, [{{r[0-9]+}}]!
26 %tmp1 = call <4 x i16> @llvm.arm.neon.vld1.v4i16(i8* %tmp0, i32 1)
34 ;CHECK: vld1.32
36 %tmp1 = call <2 x i32> @llvm.arm.neon.vld1.v2i32(i8* %tmp0, i32 1)
43 ;CHECK: vld1.32 {d16}, [{{r[0-9]+}}], {{r[0-9]+}}
46 %tmp1 = call <2 x i32> @llvm.arm.neon.vld1.v2i32(i8* %tmp0, i32 1
[all...] |
| /frameworks/av/media/libstagefright/codecs/on2/h264dec/omxdl/arm_neon/vc/comm/src/ |
| omxVCCOMM_Copy16x16_s.s | 48 VLD1 {X0,X1},[pSrc@128],step ;// Load 16 bytes from 16 byte aligned pSrc and pSrc=pSrc + step after loading
49 VLD1 {X2,X3},[pSrc@128],step
50 VLD1 {X4,X5},[pSrc@128],step
51 VLD1 {X6,X7},[pSrc@128],step
57 VLD1 {X0,X1},[pSrc@128],step
58 VLD1 {X2,X3},[pSrc@128],step
59 VLD1 {X4,X5},[pSrc@128],step
60 VLD1 {X6,X7},[pSrc@128],step
66 VLD1 {X0,X1},[pSrc@128],step
67 VLD1 {X2,X3},[pSrc@128],ste
[all...] |
| omxVCCOMM_Copy8x8_s.s | 45 VLD1 {X0},[pSrc],step ;// Load 8 bytes from 8 byte aligned pSrc, pSrc=pSrc+step after load
46 VLD1 {X1},[pSrc],step
47 VLD1 {X2},[pSrc],step
48 VLD1 {X3},[pSrc],step
53 VLD1 {X0},[pSrc],step
54 VLD1 {X1},[pSrc],step
55 VLD1 {X2},[pSrc],step
56 VLD1 {X3},[pSrc],step
|
| /hardware/samsung_slsi/exynos5/libswconverter/ |
| csc_interleave_memcpy_neon.s | 76 vld1.8 {q0}, [r11]!
77 vld1.8 {q2}, [r11]!
78 vld1.8 {q4}, [r11]!
79 vld1.8 {q6}, [r11]!
80 vld1.8 {q8}, [r11]!
81 vld1.8 {q10}, [r11]!
82 vld1.8 {q12}, [r11]!
83 vld1.8 {q14}, [r11]!
84 vld1.8 {q1}, [r12]!
85 vld1.8 {q3}, [r12]
[all...] |
| /external/libvpx/libvpx/vp9/common/arm/neon/ |
| vp9_avg_neon.asm | 36 vld1.8 {q0-q1}, [r0]!
37 vld1.8 {q2-q3}, [r0], lr
39 vld1.8 {q8-q9}, [r6@128]!
40 vld1.8 {q10-q11}, [r6@128], r4
52 vld1.8 {q0-q1}, [r0], r1
53 vld1.8 {q2-q3}, [r0], r1
54 vld1.8 {q8-q9}, [r6@128], r3
55 vld1.8 {q10-q11}, [r6@128], r3
71 vld1.8 {q0}, [r0], r1
72 vld1.8 {q1}, [r0], r
[all...] |
| vp9_short_idct16x16_1_add_neon.asm | 52 vld1.64 {d2}, [r1], r0
53 vld1.64 {d3}, [r1], r2
54 vld1.64 {d4}, [r1], r0
55 vld1.64 {d5}, [r1], r2
56 vld1.64 {d6}, [r1], r0
57 vld1.64 {d7}, [r1], r2
58 vld1.64 {d16}, [r1], r0
59 vld1.64 {d17}, [r1], r2
88 vld1.64 {d2}, [r1], r0
89 vld1.64 {d3}, [r1], r
[all...] |
| vp9_convolve8_avg_neon.asm | 67 vld1.s16 {q0}, [r5] ; filter_x
82 vld1.8 {d24}, [r0], r1
83 vld1.8 {d25}, [r0], r1
84 vld1.8 {d26}, [r0], r1
85 vld1.8 {d27}, [r0], r8
107 vld1.32 {d28[]}, [r0], r1
108 vld1.32 {d29[]}, [r0], r1
109 vld1.32 {d31[]}, [r0], r1
110 vld1.32 {d30[]}, [r0], r8
129 vld1.u32 {d6[0]}, [r2], r
[all...] |
| /frameworks/av/media/libstagefright/codecs/on2/h264dec/omxdl/arm_neon/vc/m4p2/src/ |
| omxVCM4P2_MCReconBlock_s.s | 50 VLD1 dRow0, [pSrc], srcStep
51 VLD1 dRow1, [pSrc], srcStep
52 VLD1 dRow2, [pSrc], srcStep
53 VLD1 dRow3, [pSrc], srcStep
54 VLD1 dRow4, [pSrc], srcStep
55 VLD1 dRow5, [pSrc], srcStep
56 VLD1 dRow6, [pSrc], srcStep
57 VLD1 dRow7, [pSrc], srcStep
97 VLD1 {dRow0, dRow0Shft}, [pSrc], srcStep
99 VLD1 {dRow1, dRow1Shft}, [pSrc], srcSte
[all...] |
| /external/llvm/test/MC/Disassembler/ARM/ |
| neont-VLD-reencoding.txt | 12 # CHECK: vld1.8 {d0[0]}, [r0], r0 @ encoding: [0xa0,0xf9,0x00,0x00]
13 # CHECK: vld1.8 {d0[1]}, [r0], r0 @ encoding: [0xa0,0xf9,0x20,0x00]
14 # CHECK: vld1.8 {d0[2]}, [r0], r0 @ encoding: [0xa0,0xf9,0x40,0x00]
15 # CHECK: vld1.8 {d0[3]}, [r0], r0 @ encoding: [0xa0,0xf9,0x60,0x00]
16 # CHECK: vld1.8 {d0[4]}, [r0], r0 @ encoding: [0xa0,0xf9,0x80,0x00]
17 # CHECK: vld1.8 {d0[5]}, [r0], r0 @ encoding: [0xa0,0xf9,0xa0,0x00]
18 # CHECK: vld1.8 {d0[6]}, [r0], r0 @ encoding: [0xa0,0xf9,0xc0,0x00]
19 # CHECK: vld1.8 {d0[7]}, [r0], r0 @ encoding: [0xa0,0xf9,0xe0,0x00]
30 # CHECK: vld1.16 {d0[0]}, [r0], r0 @ encoding: [0xa0,0xf9,0x00,0x04]
31 # CHECK: vld1.16 {d0[0]}, [r0:16], r0 @ encoding: [0xa0,0xf9,0x10,0x04
[all...] |
| /frameworks/av/media/libstagefright/codecs/on2/h264dec/omxdl/arm_neon/vc/m4p10/src_gcc/ |
| armVCM4P10_InterpolateLuma_HalfVer4x4_unsafe_s.S | 17 VLD1.8 {d7},[r0],r1
19 VLD1.8 {d8},[r0],r1
20 VLD1.8 {d12},[r12],r1
21 VLD1.8 {d9},[r0],r1
23 VLD1.8 {d10},[r0],r1
24 VLD1.8 {d13},[r12],r1
25 VLD1.8 {d11},[r0],r1
26 VLD1.8 {d14},[r12],r1
29 VLD1.8 {d15},[r12],r1
|
| omxVCM4P10_PredictIntra_4x4_s.S | 36 VLD1.8 {d0[]},[r0],r10
37 VLD1.8 {d1[]},[r9],r10
38 VLD1.8 {d2[]},[r0]
39 VLD1.8 {d3[]},[r9]
48 VLD1.32 {d0[0]},[r1]
62 VLD1.8 {d0[0]},[r0],r10
63 VLD1.8 {d0[1]},[r9],r10
64 VLD1.8 {d0[2]},[r0]
65 VLD1.8 {d0[3]},[r9]
68 VLD1.32 {d0[1]},[r1
[all...] |
| omxVCM4P10_FilterDeblockingLuma_HorEdge_I_s.S | 20 VLD1.8 {d0[]},[r2]
22 VLD1.8 {d2[]},[r3]
35 VLD1.8 {d7},[r0],r10
36 VLD1.8 {d6},[r6],r10
37 VLD1.8 {d5},[r0],r10
38 VLD1.8 {d4},[r6],r10
39 VLD1.8 {d8},[r0],r10
41 VLD1.8 {d9},[r6]
43 VLD1.8 {d10},[r0],r1
56 VLD1.8 {d11},[r0
[all...] |
| omxVCM4P10_PredictIntra_16x16_s.S | 44 VLD1.8 {d0,d1},[r1]
72 VLD1.8 {d2[],d3[]},[r0],r4
73 VLD1.8 {d0[],d1[]},[r8],r4
77 VLD1.8 {d2[],d3[]},[r0],r4
78 VLD1.8 {d0[],d1[]},[r8],r4
81 VLD1.8 {d2[],d3[]},[r0],r4
82 VLD1.8 {d0[],d1[]},[r8],r4
85 VLD1.8 {d2[],d3[]},[r0],r4
86 VLD1.8 {d0[],d1[]},[r8],r4
99 VLD1.8 {d2[0]},[r0],r1
[all...] |
| armVCM4P10_Interpolate_Chroma_s.S | 39 VLD1.8 {d0},[r0],r10
42 VLD1.8 {d1},[r0],lr
53 VLD1.8 {d2},[r0],r10
55 VLD1.8 {d3},[r0],lr
57 VLD1.8 {d16},[r0],r10
59 VLD1.8 {d17},[r0],lr
62 VLD1.8 {d18},[r0],r10
66 VLD1.8 {d19},[r0],lr
68 VLD1.8 {d0},[r0],r10
72 VLD1.8 {d1},[r0],l
[all...] |
| omxVCM4P10_PredictIntraChroma_8x8_s.S | 41 VLD1.8 {d1[0]},[r0],r10
42 VLD1.8 {d1[1]},[r9],r10
43 VLD1.8 {d1[2]},[r0],r10
44 VLD1.8 {d1[3]},[r9],r10
45 VLD1.8 {d1[4]},[r0],r10
46 VLD1.8 {d1[5]},[r9],r10
47 VLD1.8 {d1[6]},[r0],r10
48 VLD1.8 {d1[7]},[r9]
51 VLD1.8 {d0},[r1]
92 VLD1.8 {d0},[r1
[all...] |
| omxVCM4P10_FilterDeblockingChroma_HorEdge_I_s.S | 18 VLD1.8 {d0[]},[r2]!
21 VLD1.8 {d2[]},[r3]!
32 VLD1.8 {d6},[r0],r1
33 VLD1.8 {d5},[r0],r1
35 VLD1.8 {d4},[r0],r1
36 VLD1.8 {d8},[r0],r1
38 VLD1.8 {d9},[r0],r1
40 VLD1.8 {d10},[r0],r1
75 VLD1.8 {d0[]},[r2]
78 VLD1.8 {d2[]},[r3
[all...] |
| /external/libvpx/libvpx/vpx_scale/arm/neon/ |
| vp8_vpxyv12_copysrcframe_func_neon.asm | 53 vld1.8 {q0, q1}, [r2]!
54 vld1.8 {q4, q5}, [r10]!
55 vld1.8 {q2, q3}, [r2]!
56 vld1.8 {q6, q7}, [r10]!
57 vld1.8 {q8, q9}, [r2]!
58 vld1.8 {q12, q13}, [r10]!
59 vld1.8 {q10, q11}, [r2]!
60 vld1.8 {q14, q15}, [r10]!
77 vld1.8 {d0}, [r2]!
78 vld1.8 {d1}, [r10]
[all...] |
| vp8_vpxyv12_copy_y_neon.asm | 47 vld1.8 {q0, q1}, [r8]!
48 vld1.8 {q8, q9}, [r10]!
49 vld1.8 {q2, q3}, [r8]!
50 vld1.8 {q10, q11}, [r10]!
51 vld1.8 {q4, q5}, [r8]!
52 vld1.8 {q12, q13}, [r10]!
53 vld1.8 {q6, q7}, [r8]!
54 vld1.8 {q14, q15}, [r10]!
103 vld1.8 {q0}, [r8]!
104 vld1.8 {q1}, [r0]
[all...] |
| vp8_vpxyv12_extendframeborders_neon.asm | 42 vld1.8 {d0[], d1[]}, [r1], lr
43 vld1.8 {d4[], d5[]}, [r2], lr
44 vld1.8 {d8[], d9[]}, [r1], lr
45 vld1.8 {d12[], d13[]}, [r2], lr
46 vld1.8 {d16[], d17[]}, [r1], lr
47 vld1.8 {d20[], d21[]}, [r2], lr
48 vld1.8 {d24[], d25[]}, [r1], lr
49 vld1.8 {d28[], d29[]}, [r2], lr
87 vld1.8 {q0, q1}, [r1]!
88 vld1.8 {q8, q9}, [r2]
[all...] |
