1 ;***************************************************************************** 2 ;* x86inc.asm: x264asm abstraction layer 3 ;***************************************************************************** 4 ;* Copyright (C) 2005-2012 x264 project 5 ;* 6 ;* Authors: Loren Merritt <lorenm (a] u.washington.edu> 7 ;* Anton Mitrofanov <BugMaster (a] narod.ru> 8 ;* Jason Garrett-Glaser <darkshikari (a] gmail.com> 9 ;* Henrik Gramner <hengar-6 (a] student.ltu.se> 10 ;* 11 ;* Permission to use, copy, modify, and/or distribute this software for any 12 ;* purpose with or without fee is hereby granted, provided that the above 13 ;* copyright notice and this permission notice appear in all copies. 14 ;* 15 ;* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 16 ;* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 17 ;* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 18 ;* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 19 ;* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 20 ;* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 21 ;* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 22 ;***************************************************************************** 23 24 ; This is a header file for the x264ASM assembly language, which uses 25 ; NASM/YASM syntax combined with a large number of macros to provide easy 26 ; abstraction between different calling conventions (x86_32, win64, linux64). 27 ; It also has various other useful features to simplify writing the kind of 28 ; DSP functions that are most often used in x264. 29 30 ; Unlike the rest of x264, this file is available under an ISC license, as it 31 ; has significant usefulness outside of x264 and we want it to be available 32 ; to the largest audience possible. Of course, if you modify it for your own 33 ; purposes to add a new feature, we strongly encourage contributing a patch 34 ; as this feature might be useful for others as well. Send patches or ideas 35 ; to x264-devel (a] videolan.org . 36 37 %include "vpx_config.asm" 38 39 %define program_name vp9 40 41 42 %define UNIX64 0 43 %define WIN64 0 44 %if ARCH_X86_64 45 %ifidn __OUTPUT_FORMAT__,win32 46 %define WIN64 1 47 %elifidn __OUTPUT_FORMAT__,win64 48 %define WIN64 1 49 %elifidn __OUTPUT_FORMAT__,x64 50 %define WIN64 1 51 %else 52 %define UNIX64 1 53 %endif 54 %endif 55 56 %ifidn __OUTPUT_FORMAT__,elf32 57 %define mangle(x) x 58 %elifidn __OUTPUT_FORMAT__,elf64 59 %define mangle(x) x 60 %elifidn __OUTPUT_FORMAT__,elf 61 %define mangle(x) x 62 %elifidn __OUTPUT_FORMAT__,x64 63 %define mangle(x) x 64 %elifidn __OUTPUT_FORMAT__,win64 65 %define mangle(x) x 66 %else 67 %define mangle(x) _ %+ x 68 %endif 69 70 ; FIXME: All of the 64bit asm functions that take a stride as an argument 71 ; via register, assume that the high dword of that register is filled with 0. 72 ; This is true in practice (since we never do any 64bit arithmetic on strides, 73 ; and x264's strides are all positive), but is not guaranteed by the ABI. 74 75 ; Name of the .rodata section. 76 ; Kludge: Something on OS X fails to align .rodata even given an align attribute, 77 ; so use a different read-only section. 78 %macro SECTION_RODATA 0-1 16 79 %ifidn __OUTPUT_FORMAT__,macho64 80 SECTION .text align=%1 81 %elifidn __OUTPUT_FORMAT__,macho 82 SECTION .text align=%1 83 fakegot: 84 %elifidn __OUTPUT_FORMAT__,aout 85 section .text 86 %else 87 SECTION .rodata align=%1 88 %endif 89 %endmacro 90 91 ; aout does not support align= 92 %macro SECTION_TEXT 0-1 16 93 %ifidn __OUTPUT_FORMAT__,aout 94 SECTION .text 95 %else 96 SECTION .text align=%1 97 %endif 98 %endmacro 99 100 %if WIN64 101 %define PIC 102 %elifidn __OUTPUT_FORMAT__,macho64 103 %define PIC 104 %elif ARCH_X86_64 == 0 105 ; x86_32 doesn't require PIC. 106 ; Some distros prefer shared objects to be PIC, but nothing breaks if 107 ; the code contains a few textrels, so we'll skip that complexity. 108 %undef PIC 109 %elif CONFIG_PIC 110 %define PIC 111 %endif 112 %ifdef PIC 113 default rel 114 %endif 115 116 ; Always use long nops (reduces 0x90 spam in disassembly on x86_32) 117 %ifndef __NASM_VER__ 118 CPU amdnop 119 %else 120 %use smartalign 121 ALIGNMODE k7 122 %endif 123 124 ; Macros to eliminate most code duplication between x86_32 and x86_64: 125 ; Currently this works only for leaf functions which load all their arguments 126 ; into registers at the start, and make no other use of the stack. Luckily that 127 ; covers most of x264's asm. 128 129 ; PROLOGUE: 130 ; %1 = number of arguments. loads them from stack if needed. 131 ; %2 = number of registers used. pushes callee-saved regs if needed. 132 ; %3 = number of xmm registers used. pushes callee-saved xmm regs if needed. 133 ; %4 = list of names to define to registers 134 ; PROLOGUE can also be invoked by adding the same options to cglobal 135 136 ; e.g. 137 ; cglobal foo, 2,3,0, dst, src, tmp 138 ; declares a function (foo), taking two args (dst and src) and one local variable (tmp) 139 140 ; TODO Some functions can use some args directly from the stack. If they're the 141 ; last args then you can just not declare them, but if they're in the middle 142 ; we need more flexible macro. 143 144 ; RET: 145 ; Pops anything that was pushed by PROLOGUE, and returns. 146 147 ; REP_RET: 148 ; Same, but if it doesn't pop anything it becomes a 2-byte ret, for athlons 149 ; which are slow when a normal ret follows a branch. 150 151 ; registers: 152 ; rN and rNq are the native-size register holding function argument N 153 ; rNd, rNw, rNb are dword, word, and byte size 154 ; rNm is the original location of arg N (a register or on the stack), dword 155 ; rNmp is native size 156 157 %macro DECLARE_REG 5-6 158 %define r%1q %2 159 %define r%1d %3 160 %define r%1w %4 161 %define r%1b %5 162 %if %0 == 5 163 %define r%1m %3 164 %define r%1mp %2 165 %elif ARCH_X86_64 ; memory 166 %define r%1m [rsp + stack_offset + %6] 167 %define r%1mp qword r %+ %1m 168 %else 169 %define r%1m [esp + stack_offset + %6] 170 %define r%1mp dword r %+ %1m 171 %endif 172 %define r%1 %2 173 %endmacro 174 175 %macro DECLARE_REG_SIZE 2 176 %define r%1q r%1 177 %define e%1q r%1 178 %define r%1d e%1 179 %define e%1d e%1 180 %define r%1w %1 181 %define e%1w %1 182 %define r%1b %2 183 %define e%1b %2 184 %if ARCH_X86_64 == 0 185 %define r%1 e%1 186 %endif 187 %endmacro 188 189 DECLARE_REG_SIZE ax, al 190 DECLARE_REG_SIZE bx, bl 191 DECLARE_REG_SIZE cx, cl 192 DECLARE_REG_SIZE dx, dl 193 DECLARE_REG_SIZE si, sil 194 DECLARE_REG_SIZE di, dil 195 DECLARE_REG_SIZE bp, bpl 196 197 ; t# defines for when per-arch register allocation is more complex than just function arguments 198 199 %macro DECLARE_REG_TMP 1-* 200 %assign %%i 0 201 %rep %0 202 CAT_XDEFINE t, %%i, r%1 203 %assign %%i %%i+1 204 %rotate 1 205 %endrep 206 %endmacro 207 208 %macro DECLARE_REG_TMP_SIZE 0-* 209 %rep %0 210 %define t%1q t%1 %+ q 211 %define t%1d t%1 %+ d 212 %define t%1w t%1 %+ w 213 %define t%1b t%1 %+ b 214 %rotate 1 215 %endrep 216 %endmacro 217 218 DECLARE_REG_TMP_SIZE 0,1,2,3,4,5,6,7,8,9,10,11,12,13,14 219 220 %if ARCH_X86_64 221 %define gprsize 8 222 %else 223 %define gprsize 4 224 %endif 225 226 %macro PUSH 1 227 push %1 228 %assign stack_offset stack_offset+gprsize 229 %endmacro 230 231 %macro POP 1 232 pop %1 233 %assign stack_offset stack_offset-gprsize 234 %endmacro 235 236 %macro PUSH_IF_USED 1-* 237 %rep %0 238 %if %1 < regs_used 239 PUSH r%1 240 %endif 241 %rotate 1 242 %endrep 243 %endmacro 244 245 %macro POP_IF_USED 1-* 246 %rep %0 247 %if %1 < regs_used 248 pop r%1 249 %endif 250 %rotate 1 251 %endrep 252 %endmacro 253 254 %macro LOAD_IF_USED 1-* 255 %rep %0 256 %if %1 < num_args 257 mov r%1, r %+ %1 %+ mp 258 %endif 259 %rotate 1 260 %endrep 261 %endmacro 262 263 %macro SUB 2 264 sub %1, %2 265 %ifidn %1, rsp 266 %assign stack_offset stack_offset+(%2) 267 %endif 268 %endmacro 269 270 %macro ADD 2 271 add %1, %2 272 %ifidn %1, rsp 273 %assign stack_offset stack_offset-(%2) 274 %endif 275 %endmacro 276 277 %macro movifnidn 2 278 %ifnidn %1, %2 279 mov %1, %2 280 %endif 281 %endmacro 282 283 %macro movsxdifnidn 2 284 %ifnidn %1, %2 285 movsxd %1, %2 286 %endif 287 %endmacro 288 289 %macro ASSERT 1 290 %if (%1) == 0 291 %error assert failed 292 %endif 293 %endmacro 294 295 %macro DEFINE_ARGS 0-* 296 %ifdef n_arg_names 297 %assign %%i 0 298 %rep n_arg_names 299 CAT_UNDEF arg_name %+ %%i, q 300 CAT_UNDEF arg_name %+ %%i, d 301 CAT_UNDEF arg_name %+ %%i, w 302 CAT_UNDEF arg_name %+ %%i, b 303 CAT_UNDEF arg_name %+ %%i, m 304 CAT_UNDEF arg_name %+ %%i, mp 305 CAT_UNDEF arg_name, %%i 306 %assign %%i %%i+1 307 %endrep 308 %endif 309 310 %xdefine %%stack_offset stack_offset 311 %undef stack_offset ; so that the current value of stack_offset doesn't get baked in by xdefine 312 %assign %%i 0 313 %rep %0 314 %xdefine %1q r %+ %%i %+ q 315 %xdefine %1d r %+ %%i %+ d 316 %xdefine %1w r %+ %%i %+ w 317 %xdefine %1b r %+ %%i %+ b 318 %xdefine %1m r %+ %%i %+ m 319 %xdefine %1mp r %+ %%i %+ mp 320 CAT_XDEFINE arg_name, %%i, %1 321 %assign %%i %%i+1 322 %rotate 1 323 %endrep 324 %xdefine stack_offset %%stack_offset 325 %assign n_arg_names %0 326 %endmacro 327 328 %if WIN64 ; Windows x64 ;================================================= 329 330 DECLARE_REG 0, rcx, ecx, cx, cl 331 DECLARE_REG 1, rdx, edx, dx, dl 332 DECLARE_REG 2, R8, R8D, R8W, R8B 333 DECLARE_REG 3, R9, R9D, R9W, R9B 334 DECLARE_REG 4, R10, R10D, R10W, R10B, 40 335 DECLARE_REG 5, R11, R11D, R11W, R11B, 48 336 DECLARE_REG 6, rax, eax, ax, al, 56 337 DECLARE_REG 7, rdi, edi, di, dil, 64 338 DECLARE_REG 8, rsi, esi, si, sil, 72 339 DECLARE_REG 9, rbx, ebx, bx, bl, 80 340 DECLARE_REG 10, rbp, ebp, bp, bpl, 88 341 DECLARE_REG 11, R12, R12D, R12W, R12B, 96 342 DECLARE_REG 12, R13, R13D, R13W, R13B, 104 343 DECLARE_REG 13, R14, R14D, R14W, R14B, 112 344 DECLARE_REG 14, R15, R15D, R15W, R15B, 120 345 346 %macro PROLOGUE 2-4+ 0 ; #args, #regs, #xmm_regs, arg_names... 347 %assign num_args %1 348 %assign regs_used %2 349 ASSERT regs_used >= num_args 350 ASSERT regs_used <= 15 351 PUSH_IF_USED 7, 8, 9, 10, 11, 12, 13, 14 352 %if mmsize == 8 353 %assign xmm_regs_used 0 354 %else 355 WIN64_SPILL_XMM %3 356 %endif 357 LOAD_IF_USED 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14 358 DEFINE_ARGS %4 359 %endmacro 360 361 %macro WIN64_SPILL_XMM 1 362 %assign xmm_regs_used %1 363 ASSERT xmm_regs_used <= 16 364 %if xmm_regs_used > 6 365 SUB rsp, (xmm_regs_used-6)*16+16 366 %assign %%i xmm_regs_used 367 %rep (xmm_regs_used-6) 368 %assign %%i %%i-1 369 movdqa [rsp + (%%i-6)*16+(~stack_offset&8)], xmm %+ %%i 370 %endrep 371 %endif 372 %endmacro 373 374 %macro WIN64_RESTORE_XMM_INTERNAL 1 375 %if xmm_regs_used > 6 376 %assign %%i xmm_regs_used 377 %rep (xmm_regs_used-6) 378 %assign %%i %%i-1 379 movdqa xmm %+ %%i, [%1 + (%%i-6)*16+(~stack_offset&8)] 380 %endrep 381 add %1, (xmm_regs_used-6)*16+16 382 %endif 383 %endmacro 384 385 %macro WIN64_RESTORE_XMM 1 386 WIN64_RESTORE_XMM_INTERNAL %1 387 %assign stack_offset stack_offset-(xmm_regs_used-6)*16+16 388 %assign xmm_regs_used 0 389 %endmacro 390 391 %macro RET 0 392 WIN64_RESTORE_XMM_INTERNAL rsp 393 POP_IF_USED 14, 13, 12, 11, 10, 9, 8, 7 394 ret 395 %endmacro 396 397 %macro REP_RET 0 398 %if regs_used > 7 || xmm_regs_used > 6 399 RET 400 %else 401 rep ret 402 %endif 403 %endmacro 404 405 %elif ARCH_X86_64 ; *nix x64 ;============================================= 406 407 DECLARE_REG 0, rdi, edi, di, dil 408 DECLARE_REG 1, rsi, esi, si, sil 409 DECLARE_REG 2, rdx, edx, dx, dl 410 DECLARE_REG 3, rcx, ecx, cx, cl 411 DECLARE_REG 4, R8, R8D, R8W, R8B 412 DECLARE_REG 5, R9, R9D, R9W, R9B 413 DECLARE_REG 6, rax, eax, ax, al, 8 414 DECLARE_REG 7, R10, R10D, R10W, R10B, 16 415 DECLARE_REG 8, R11, R11D, R11W, R11B, 24 416 DECLARE_REG 9, rbx, ebx, bx, bl, 32 417 DECLARE_REG 10, rbp, ebp, bp, bpl, 40 418 DECLARE_REG 11, R12, R12D, R12W, R12B, 48 419 DECLARE_REG 12, R13, R13D, R13W, R13B, 56 420 DECLARE_REG 13, R14, R14D, R14W, R14B, 64 421 DECLARE_REG 14, R15, R15D, R15W, R15B, 72 422 423 %macro PROLOGUE 2-4+ ; #args, #regs, #xmm_regs, arg_names... 424 %assign num_args %1 425 %assign regs_used %2 426 ASSERT regs_used >= num_args 427 ASSERT regs_used <= 15 428 PUSH_IF_USED 9, 10, 11, 12, 13, 14 429 LOAD_IF_USED 6, 7, 8, 9, 10, 11, 12, 13, 14 430 DEFINE_ARGS %4 431 %endmacro 432 433 %macro RET 0 434 POP_IF_USED 14, 13, 12, 11, 10, 9 435 ret 436 %endmacro 437 438 %macro REP_RET 0 439 %if regs_used > 9 440 RET 441 %else 442 rep ret 443 %endif 444 %endmacro 445 446 %else ; X86_32 ;============================================================== 447 448 DECLARE_REG 0, eax, eax, ax, al, 4 449 DECLARE_REG 1, ecx, ecx, cx, cl, 8 450 DECLARE_REG 2, edx, edx, dx, dl, 12 451 DECLARE_REG 3, ebx, ebx, bx, bl, 16 452 DECLARE_REG 4, esi, esi, si, null, 20 453 DECLARE_REG 5, edi, edi, di, null, 24 454 DECLARE_REG 6, ebp, ebp, bp, null, 28 455 %define rsp esp 456 457 %macro DECLARE_ARG 1-* 458 %rep %0 459 %define r%1m [esp + stack_offset + 4*%1 + 4] 460 %define r%1mp dword r%1m 461 %rotate 1 462 %endrep 463 %endmacro 464 465 DECLARE_ARG 7, 8, 9, 10, 11, 12, 13, 14 466 467 %macro PROLOGUE 2-4+ ; #args, #regs, #xmm_regs, arg_names... 468 %assign num_args %1 469 %assign regs_used %2 470 %if regs_used > 7 471 %assign regs_used 7 472 %endif 473 ASSERT regs_used >= num_args 474 PUSH_IF_USED 3, 4, 5, 6 475 LOAD_IF_USED 0, 1, 2, 3, 4, 5, 6 476 DEFINE_ARGS %4 477 %endmacro 478 479 %macro RET 0 480 POP_IF_USED 6, 5, 4, 3 481 ret 482 %endmacro 483 484 %macro REP_RET 0 485 %if regs_used > 3 486 RET 487 %else 488 rep ret 489 %endif 490 %endmacro 491 492 %endif ;====================================================================== 493 494 %if WIN64 == 0 495 %macro WIN64_SPILL_XMM 1 496 %endmacro 497 %macro WIN64_RESTORE_XMM 1 498 %endmacro 499 %endif 500 501 ;============================================================================= 502 ; arch-independent part 503 ;============================================================================= 504 505 %assign function_align 16 506 507 ; Begin a function. 508 ; Applies any symbol mangling needed for C linkage, and sets up a define such that 509 ; subsequent uses of the function name automatically refer to the mangled version. 510 ; Appends cpuflags to the function name if cpuflags has been specified. 511 %macro cglobal 1-2+ ; name, [PROLOGUE args] 512 %if %0 == 1 513 cglobal_internal %1 %+ SUFFIX 514 %else 515 cglobal_internal %1 %+ SUFFIX, %2 516 %endif 517 %endmacro 518 %macro cglobal_internal 1-2+ 519 %ifndef cglobaled_%1 520 %xdefine %1 mangle(program_name %+ _ %+ %1) 521 %xdefine %1.skip_prologue %1 %+ .skip_prologue 522 CAT_XDEFINE cglobaled_, %1, 1 523 %endif 524 %xdefine current_function %1 525 %ifidn __OUTPUT_FORMAT__,elf 526 global %1:function hidden 527 %elifidn __OUTPUT_FORMAT__,elf32 528 global %1:function hidden 529 %elifidn __OUTPUT_FORMAT__,elf64 530 global %1:function hidden 531 %else 532 global %1 533 %endif 534 align function_align 535 %1: 536 RESET_MM_PERMUTATION ; not really needed, but makes disassembly somewhat nicer 537 %assign stack_offset 0 538 %if %0 > 1 539 PROLOGUE %2 540 %endif 541 %endmacro 542 543 %macro cextern 1 544 %xdefine %1 mangle(program_name %+ _ %+ %1) 545 CAT_XDEFINE cglobaled_, %1, 1 546 extern %1 547 %endmacro 548 549 ; like cextern, but without the prefix 550 %macro cextern_naked 1 551 %xdefine %1 mangle(%1) 552 CAT_XDEFINE cglobaled_, %1, 1 553 extern %1 554 %endmacro 555 556 %macro const 2+ 557 %xdefine %1 mangle(program_name %+ _ %+ %1) 558 global %1 559 %1: %2 560 %endmacro 561 562 ; This is needed for ELF, otherwise the GNU linker assumes the stack is 563 ; executable by default. 564 %ifidn __OUTPUT_FORMAT__,elf 565 SECTION .note.GNU-stack noalloc noexec nowrite progbits 566 %elifidn __OUTPUT_FORMAT__,elf32 567 SECTION .note.GNU-stack noalloc noexec nowrite progbits 568 %elifidn __OUTPUT_FORMAT__,elf64 569 SECTION .note.GNU-stack noalloc noexec nowrite progbits 570 %endif 571 572 ; cpuflags 573 574 %assign cpuflags_mmx (1<<0) 575 %assign cpuflags_mmx2 (1<<1) | cpuflags_mmx 576 %assign cpuflags_3dnow (1<<2) | cpuflags_mmx 577 %assign cpuflags_3dnow2 (1<<3) | cpuflags_3dnow 578 %assign cpuflags_sse (1<<4) | cpuflags_mmx2 579 %assign cpuflags_sse2 (1<<5) | cpuflags_sse 580 %assign cpuflags_sse2slow (1<<6) | cpuflags_sse2 581 %assign cpuflags_sse3 (1<<7) | cpuflags_sse2 582 %assign cpuflags_ssse3 (1<<8) | cpuflags_sse3 583 %assign cpuflags_sse4 (1<<9) | cpuflags_ssse3 584 %assign cpuflags_sse42 (1<<10)| cpuflags_sse4 585 %assign cpuflags_avx (1<<11)| cpuflags_sse42 586 %assign cpuflags_xop (1<<12)| cpuflags_avx 587 %assign cpuflags_fma4 (1<<13)| cpuflags_avx 588 589 %assign cpuflags_cache32 (1<<16) 590 %assign cpuflags_cache64 (1<<17) 591 %assign cpuflags_slowctz (1<<18) 592 %assign cpuflags_lzcnt (1<<19) 593 %assign cpuflags_misalign (1<<20) 594 %assign cpuflags_aligned (1<<21) ; not a cpu feature, but a function variant 595 %assign cpuflags_atom (1<<22) 596 597 %define cpuflag(x) ((cpuflags & (cpuflags_ %+ x)) == (cpuflags_ %+ x)) 598 %define notcpuflag(x) ((cpuflags & (cpuflags_ %+ x)) != (cpuflags_ %+ x)) 599 600 ; Takes up to 2 cpuflags from the above list. 601 ; All subsequent functions (up to the next INIT_CPUFLAGS) is built for the specified cpu. 602 ; You shouldn't need to invoke this macro directly, it's a subroutine for INIT_MMX &co. 603 %macro INIT_CPUFLAGS 0-2 604 %if %0 >= 1 605 %xdefine cpuname %1 606 %assign cpuflags cpuflags_%1 607 %if %0 >= 2 608 %xdefine cpuname %1_%2 609 %assign cpuflags cpuflags | cpuflags_%2 610 %endif 611 %xdefine SUFFIX _ %+ cpuname 612 %if cpuflag(avx) 613 %assign avx_enabled 1 614 %endif 615 %if mmsize == 16 && notcpuflag(sse2) 616 %define mova movaps 617 %define movu movups 618 %define movnta movntps 619 %endif 620 %if cpuflag(aligned) 621 %define movu mova 622 %elifidn %1, sse3 623 %define movu lddqu 624 %endif 625 %else 626 %xdefine SUFFIX 627 %undef cpuname 628 %undef cpuflags 629 %endif 630 %endmacro 631 632 ; merge mmx and sse* 633 634 %macro CAT_XDEFINE 3 635 %xdefine %1%2 %3 636 %endmacro 637 638 %macro CAT_UNDEF 2 639 %undef %1%2 640 %endmacro 641 642 %macro INIT_MMX 0-1+ 643 %assign avx_enabled 0 644 %define RESET_MM_PERMUTATION INIT_MMX %1 645 %define mmsize 8 646 %define num_mmregs 8 647 %define mova movq 648 %define movu movq 649 %define movh movd 650 %define movnta movntq 651 %assign %%i 0 652 %rep 8 653 CAT_XDEFINE m, %%i, mm %+ %%i 654 CAT_XDEFINE nmm, %%i, %%i 655 %assign %%i %%i+1 656 %endrep 657 %rep 8 658 CAT_UNDEF m, %%i 659 CAT_UNDEF nmm, %%i 660 %assign %%i %%i+1 661 %endrep 662 INIT_CPUFLAGS %1 663 %endmacro 664 665 %macro INIT_XMM 0-1+ 666 %assign avx_enabled 0 667 %define RESET_MM_PERMUTATION INIT_XMM %1 668 %define mmsize 16 669 %define num_mmregs 8 670 %if ARCH_X86_64 671 %define num_mmregs 16 672 %endif 673 %define mova movdqa 674 %define movu movdqu 675 %define movh movq 676 %define movnta movntdq 677 %assign %%i 0 678 %rep num_mmregs 679 CAT_XDEFINE m, %%i, xmm %+ %%i 680 CAT_XDEFINE nxmm, %%i, %%i 681 %assign %%i %%i+1 682 %endrep 683 INIT_CPUFLAGS %1 684 %endmacro 685 686 ; FIXME: INIT_AVX can be replaced by INIT_XMM avx 687 %macro INIT_AVX 0 688 INIT_XMM 689 %assign avx_enabled 1 690 %define PALIGNR PALIGNR_SSSE3 691 %define RESET_MM_PERMUTATION INIT_AVX 692 %endmacro 693 694 %macro INIT_YMM 0-1+ 695 %assign avx_enabled 1 696 %define RESET_MM_PERMUTATION INIT_YMM %1 697 %define mmsize 32 698 %define num_mmregs 8 699 %if ARCH_X86_64 700 %define num_mmregs 16 701 %endif 702 %define mova vmovaps 703 %define movu vmovups 704 %undef movh 705 %define movnta vmovntps 706 %assign %%i 0 707 %rep num_mmregs 708 CAT_XDEFINE m, %%i, ymm %+ %%i 709 CAT_XDEFINE nymm, %%i, %%i 710 %assign %%i %%i+1 711 %endrep 712 INIT_CPUFLAGS %1 713 %endmacro 714 715 INIT_XMM 716 717 ; I often want to use macros that permute their arguments. e.g. there's no 718 ; efficient way to implement butterfly or transpose or dct without swapping some 719 ; arguments. 720 ; 721 ; I would like to not have to manually keep track of the permutations: 722 ; If I insert a permutation in the middle of a function, it should automatically 723 ; change everything that follows. For more complex macros I may also have multiple 724 ; implementations, e.g. the SSE2 and SSSE3 versions may have different permutations. 725 ; 726 ; Hence these macros. Insert a PERMUTE or some SWAPs at the end of a macro that 727 ; permutes its arguments. It's equivalent to exchanging the contents of the 728 ; registers, except that this way you exchange the register names instead, so it 729 ; doesn't cost any cycles. 730 731 %macro PERMUTE 2-* ; takes a list of pairs to swap 732 %rep %0/2 733 %xdefine tmp%2 m%2 734 %xdefine ntmp%2 nm%2 735 %rotate 2 736 %endrep 737 %rep %0/2 738 %xdefine m%1 tmp%2 739 %xdefine nm%1 ntmp%2 740 %undef tmp%2 741 %undef ntmp%2 742 %rotate 2 743 %endrep 744 %endmacro 745 746 %macro SWAP 2-* ; swaps a single chain (sometimes more concise than pairs) 747 %rep %0-1 748 %ifdef m%1 749 %xdefine tmp m%1 750 %xdefine m%1 m%2 751 %xdefine m%2 tmp 752 CAT_XDEFINE n, m%1, %1 753 CAT_XDEFINE n, m%2, %2 754 %else 755 ; If we were called as "SWAP m0,m1" rather than "SWAP 0,1" infer the original numbers here. 756 ; Be careful using this mode in nested macros though, as in some cases there may be 757 ; other copies of m# that have already been dereferenced and don't get updated correctly. 758 %xdefine %%n1 n %+ %1 759 %xdefine %%n2 n %+ %2 760 %xdefine tmp m %+ %%n1 761 CAT_XDEFINE m, %%n1, m %+ %%n2 762 CAT_XDEFINE m, %%n2, tmp 763 CAT_XDEFINE n, m %+ %%n1, %%n1 764 CAT_XDEFINE n, m %+ %%n2, %%n2 765 %endif 766 %undef tmp 767 %rotate 1 768 %endrep 769 %endmacro 770 771 ; If SAVE_MM_PERMUTATION is placed at the end of a function, then any later 772 ; calls to that function will automatically load the permutation, so values can 773 ; be returned in mmregs. 774 %macro SAVE_MM_PERMUTATION 0-1 775 %if %0 776 %xdefine %%f %1_m 777 %else 778 %xdefine %%f current_function %+ _m 779 %endif 780 %assign %%i 0 781 %rep num_mmregs 782 CAT_XDEFINE %%f, %%i, m %+ %%i 783 %assign %%i %%i+1 784 %endrep 785 %endmacro 786 787 %macro LOAD_MM_PERMUTATION 1 ; name to load from 788 %ifdef %1_m0 789 %assign %%i 0 790 %rep num_mmregs 791 CAT_XDEFINE m, %%i, %1_m %+ %%i 792 CAT_XDEFINE n, m %+ %%i, %%i 793 %assign %%i %%i+1 794 %endrep 795 %endif 796 %endmacro 797 798 ; Append cpuflags to the callee's name iff the appended name is known and the plain name isn't 799 %macro call 1 800 call_internal %1, %1 %+ SUFFIX 801 %endmacro 802 %macro call_internal 2 803 %xdefine %%i %1 804 %ifndef cglobaled_%1 805 %ifdef cglobaled_%2 806 %xdefine %%i %2 807 %endif 808 %endif 809 call %%i 810 LOAD_MM_PERMUTATION %%i 811 %endmacro 812 813 ; Substitutions that reduce instruction size but are functionally equivalent 814 %macro add 2 815 %ifnum %2 816 %if %2==128 817 sub %1, -128 818 %else 819 add %1, %2 820 %endif 821 %else 822 add %1, %2 823 %endif 824 %endmacro 825 826 %macro sub 2 827 %ifnum %2 828 %if %2==128 829 add %1, -128 830 %else 831 sub %1, %2 832 %endif 833 %else 834 sub %1, %2 835 %endif 836 %endmacro 837 838 ;============================================================================= 839 ; AVX abstraction layer 840 ;============================================================================= 841 842 %assign i 0 843 %rep 16 844 %if i < 8 845 CAT_XDEFINE sizeofmm, i, 8 846 %endif 847 CAT_XDEFINE sizeofxmm, i, 16 848 CAT_XDEFINE sizeofymm, i, 32 849 %assign i i+1 850 %endrep 851 %undef i 852 853 ;%1 == instruction 854 ;%2 == 1 if float, 0 if int 855 ;%3 == 1 if 4-operand (xmm, xmm, xmm, imm), 0 if 2- or 3-operand (xmm, xmm, xmm) 856 ;%4 == number of operands given 857 ;%5+: operands 858 %macro RUN_AVX_INSTR 6-7+ 859 %ifid %5 860 %define %%size sizeof%5 861 %else 862 %define %%size mmsize 863 %endif 864 %if %%size==32 865 %if %0 >= 7 866 v%1 %5, %6, %7 867 %else 868 v%1 %5, %6 869 %endif 870 %else 871 %if %%size==8 872 %define %%regmov movq 873 %elif %2 874 %define %%regmov movaps 875 %else 876 %define %%regmov movdqa 877 %endif 878 879 %if %4>=3+%3 880 %ifnidn %5, %6 881 %if avx_enabled && sizeof%5==16 882 v%1 %5, %6, %7 883 %else 884 %%regmov %5, %6 885 %1 %5, %7 886 %endif 887 %else 888 %1 %5, %7 889 %endif 890 %elif %3 891 %1 %5, %6, %7 892 %else 893 %1 %5, %6 894 %endif 895 %endif 896 %endmacro 897 898 ; 3arg AVX ops with a memory arg can only have it in src2, 899 ; whereas SSE emulation of 3arg prefers to have it in src1 (i.e. the mov). 900 ; So, if the op is symmetric and the wrong one is memory, swap them. 901 %macro RUN_AVX_INSTR1 8 902 %assign %%swap 0 903 %if avx_enabled 904 %ifnid %6 905 %assign %%swap 1 906 %endif 907 %elifnidn %5, %6 908 %ifnid %7 909 %assign %%swap 1 910 %endif 911 %endif 912 %if %%swap && %3 == 0 && %8 == 1 913 RUN_AVX_INSTR %1, %2, %3, %4, %5, %7, %6 914 %else 915 RUN_AVX_INSTR %1, %2, %3, %4, %5, %6, %7 916 %endif 917 %endmacro 918 919 ;%1 == instruction 920 ;%2 == 1 if float, 0 if int 921 ;%3 == 1 if 4-operand (xmm, xmm, xmm, imm), 0 if 3-operand (xmm, xmm, xmm) 922 ;%4 == 1 if symmetric (i.e. doesn't matter which src arg is which), 0 if not 923 %macro AVX_INSTR 4 924 %macro %1 2-9 fnord, fnord, fnord, %1, %2, %3, %4 925 %ifidn %3, fnord 926 RUN_AVX_INSTR %6, %7, %8, 2, %1, %2 927 %elifidn %4, fnord 928 RUN_AVX_INSTR1 %6, %7, %8, 3, %1, %2, %3, %9 929 %elifidn %5, fnord 930 RUN_AVX_INSTR %6, %7, %8, 4, %1, %2, %3, %4 931 %else 932 RUN_AVX_INSTR %6, %7, %8, 5, %1, %2, %3, %4, %5 933 %endif 934 %endmacro 935 %endmacro 936 937 AVX_INSTR addpd, 1, 0, 1 938 AVX_INSTR addps, 1, 0, 1 939 AVX_INSTR addsd, 1, 0, 1 940 AVX_INSTR addss, 1, 0, 1 941 AVX_INSTR addsubpd, 1, 0, 0 942 AVX_INSTR addsubps, 1, 0, 0 943 AVX_INSTR andpd, 1, 0, 1 944 AVX_INSTR andps, 1, 0, 1 945 AVX_INSTR andnpd, 1, 0, 0 946 AVX_INSTR andnps, 1, 0, 0 947 AVX_INSTR blendpd, 1, 0, 0 948 AVX_INSTR blendps, 1, 0, 0 949 AVX_INSTR blendvpd, 1, 0, 0 950 AVX_INSTR blendvps, 1, 0, 0 951 AVX_INSTR cmppd, 1, 0, 0 952 AVX_INSTR cmpps, 1, 0, 0 953 AVX_INSTR cmpsd, 1, 0, 0 954 AVX_INSTR cmpss, 1, 0, 0 955 AVX_INSTR cvtdq2ps, 1, 0, 0 956 AVX_INSTR cvtps2dq, 1, 0, 0 957 AVX_INSTR divpd, 1, 0, 0 958 AVX_INSTR divps, 1, 0, 0 959 AVX_INSTR divsd, 1, 0, 0 960 AVX_INSTR divss, 1, 0, 0 961 AVX_INSTR dppd, 1, 1, 0 962 AVX_INSTR dpps, 1, 1, 0 963 AVX_INSTR haddpd, 1, 0, 0 964 AVX_INSTR haddps, 1, 0, 0 965 AVX_INSTR hsubpd, 1, 0, 0 966 AVX_INSTR hsubps, 1, 0, 0 967 AVX_INSTR maxpd, 1, 0, 1 968 AVX_INSTR maxps, 1, 0, 1 969 AVX_INSTR maxsd, 1, 0, 1 970 AVX_INSTR maxss, 1, 0, 1 971 AVX_INSTR minpd, 1, 0, 1 972 AVX_INSTR minps, 1, 0, 1 973 AVX_INSTR minsd, 1, 0, 1 974 AVX_INSTR minss, 1, 0, 1 975 AVX_INSTR movhlps, 1, 0, 0 976 AVX_INSTR movlhps, 1, 0, 0 977 AVX_INSTR movsd, 1, 0, 0 978 AVX_INSTR movss, 1, 0, 0 979 AVX_INSTR mpsadbw, 0, 1, 0 980 AVX_INSTR mulpd, 1, 0, 1 981 AVX_INSTR mulps, 1, 0, 1 982 AVX_INSTR mulsd, 1, 0, 1 983 AVX_INSTR mulss, 1, 0, 1 984 AVX_INSTR orpd, 1, 0, 1 985 AVX_INSTR orps, 1, 0, 1 986 AVX_INSTR packsswb, 0, 0, 0 987 AVX_INSTR packssdw, 0, 0, 0 988 AVX_INSTR packuswb, 0, 0, 0 989 AVX_INSTR packusdw, 0, 0, 0 990 AVX_INSTR paddb, 0, 0, 1 991 AVX_INSTR paddw, 0, 0, 1 992 AVX_INSTR paddd, 0, 0, 1 993 AVX_INSTR paddq, 0, 0, 1 994 AVX_INSTR paddsb, 0, 0, 1 995 AVX_INSTR paddsw, 0, 0, 1 996 AVX_INSTR paddusb, 0, 0, 1 997 AVX_INSTR paddusw, 0, 0, 1 998 AVX_INSTR palignr, 0, 1, 0 999 AVX_INSTR pand, 0, 0, 1 1000 AVX_INSTR pandn, 0, 0, 0 1001 AVX_INSTR pavgb, 0, 0, 1 1002 AVX_INSTR pavgw, 0, 0, 1 1003 AVX_INSTR pblendvb, 0, 0, 0 1004 AVX_INSTR pblendw, 0, 1, 0 1005 AVX_INSTR pcmpestri, 0, 0, 0 1006 AVX_INSTR pcmpestrm, 0, 0, 0 1007 AVX_INSTR pcmpistri, 0, 0, 0 1008 AVX_INSTR pcmpistrm, 0, 0, 0 1009 AVX_INSTR pcmpeqb, 0, 0, 1 1010 AVX_INSTR pcmpeqw, 0, 0, 1 1011 AVX_INSTR pcmpeqd, 0, 0, 1 1012 AVX_INSTR pcmpeqq, 0, 0, 1 1013 AVX_INSTR pcmpgtb, 0, 0, 0 1014 AVX_INSTR pcmpgtw, 0, 0, 0 1015 AVX_INSTR pcmpgtd, 0, 0, 0 1016 AVX_INSTR pcmpgtq, 0, 0, 0 1017 AVX_INSTR phaddw, 0, 0, 0 1018 AVX_INSTR phaddd, 0, 0, 0 1019 AVX_INSTR phaddsw, 0, 0, 0 1020 AVX_INSTR phsubw, 0, 0, 0 1021 AVX_INSTR phsubd, 0, 0, 0 1022 AVX_INSTR phsubsw, 0, 0, 0 1023 AVX_INSTR pmaddwd, 0, 0, 1 1024 AVX_INSTR pmaddubsw, 0, 0, 0 1025 AVX_INSTR pmaxsb, 0, 0, 1 1026 AVX_INSTR pmaxsw, 0, 0, 1 1027 AVX_INSTR pmaxsd, 0, 0, 1 1028 AVX_INSTR pmaxub, 0, 0, 1 1029 AVX_INSTR pmaxuw, 0, 0, 1 1030 AVX_INSTR pmaxud, 0, 0, 1 1031 AVX_INSTR pminsb, 0, 0, 1 1032 AVX_INSTR pminsw, 0, 0, 1 1033 AVX_INSTR pminsd, 0, 0, 1 1034 AVX_INSTR pminub, 0, 0, 1 1035 AVX_INSTR pminuw, 0, 0, 1 1036 AVX_INSTR pminud, 0, 0, 1 1037 AVX_INSTR pmulhuw, 0, 0, 1 1038 AVX_INSTR pmulhrsw, 0, 0, 1 1039 AVX_INSTR pmulhw, 0, 0, 1 1040 AVX_INSTR pmullw, 0, 0, 1 1041 AVX_INSTR pmulld, 0, 0, 1 1042 AVX_INSTR pmuludq, 0, 0, 1 1043 AVX_INSTR pmuldq, 0, 0, 1 1044 AVX_INSTR por, 0, 0, 1 1045 AVX_INSTR psadbw, 0, 0, 1 1046 AVX_INSTR pshufb, 0, 0, 0 1047 AVX_INSTR psignb, 0, 0, 0 1048 AVX_INSTR psignw, 0, 0, 0 1049 AVX_INSTR psignd, 0, 0, 0 1050 AVX_INSTR psllw, 0, 0, 0 1051 AVX_INSTR pslld, 0, 0, 0 1052 AVX_INSTR psllq, 0, 0, 0 1053 AVX_INSTR pslldq, 0, 0, 0 1054 AVX_INSTR psraw, 0, 0, 0 1055 AVX_INSTR psrad, 0, 0, 0 1056 AVX_INSTR psrlw, 0, 0, 0 1057 AVX_INSTR psrld, 0, 0, 0 1058 AVX_INSTR psrlq, 0, 0, 0 1059 AVX_INSTR psrldq, 0, 0, 0 1060 AVX_INSTR psubb, 0, 0, 0 1061 AVX_INSTR psubw, 0, 0, 0 1062 AVX_INSTR psubd, 0, 0, 0 1063 AVX_INSTR psubq, 0, 0, 0 1064 AVX_INSTR psubsb, 0, 0, 0 1065 AVX_INSTR psubsw, 0, 0, 0 1066 AVX_INSTR psubusb, 0, 0, 0 1067 AVX_INSTR psubusw, 0, 0, 0 1068 AVX_INSTR punpckhbw, 0, 0, 0 1069 AVX_INSTR punpckhwd, 0, 0, 0 1070 AVX_INSTR punpckhdq, 0, 0, 0 1071 AVX_INSTR punpckhqdq, 0, 0, 0 1072 AVX_INSTR punpcklbw, 0, 0, 0 1073 AVX_INSTR punpcklwd, 0, 0, 0 1074 AVX_INSTR punpckldq, 0, 0, 0 1075 AVX_INSTR punpcklqdq, 0, 0, 0 1076 AVX_INSTR pxor, 0, 0, 1 1077 AVX_INSTR shufps, 1, 1, 0 1078 AVX_INSTR subpd, 1, 0, 0 1079 AVX_INSTR subps, 1, 0, 0 1080 AVX_INSTR subsd, 1, 0, 0 1081 AVX_INSTR subss, 1, 0, 0 1082 AVX_INSTR unpckhpd, 1, 0, 0 1083 AVX_INSTR unpckhps, 1, 0, 0 1084 AVX_INSTR unpcklpd, 1, 0, 0 1085 AVX_INSTR unpcklps, 1, 0, 0 1086 AVX_INSTR xorpd, 1, 0, 1 1087 AVX_INSTR xorps, 1, 0, 1 1088 1089 ; 3DNow instructions, for sharing code between AVX, SSE and 3DN 1090 AVX_INSTR pfadd, 1, 0, 1 1091 AVX_INSTR pfsub, 1, 0, 0 1092 AVX_INSTR pfmul, 1, 0, 1 1093 1094 ; base-4 constants for shuffles 1095 %assign i 0 1096 %rep 256 1097 %assign j ((i>>6)&3)*1000 + ((i>>4)&3)*100 + ((i>>2)&3)*10 + (i&3) 1098 %if j < 10 1099 CAT_XDEFINE q000, j, i 1100 %elif j < 100 1101 CAT_XDEFINE q00, j, i 1102 %elif j < 1000 1103 CAT_XDEFINE q0, j, i 1104 %else 1105 CAT_XDEFINE q, j, i 1106 %endif 1107 %assign i i+1 1108 %endrep 1109 %undef i 1110 %undef j 1111 1112 %macro FMA_INSTR 3 1113 %macro %1 4-7 %1, %2, %3 1114 %if cpuflag(xop) 1115 v%5 %1, %2, %3, %4 1116 %else 1117 %6 %1, %2, %3 1118 %7 %1, %4 1119 %endif 1120 %endmacro 1121 %endmacro 1122 1123 FMA_INSTR pmacsdd, pmulld, paddd 1124 FMA_INSTR pmacsww, pmullw, paddw 1125 FMA_INSTR pmadcswd, pmaddwd, paddd 1126
