1 ########################################################### 2 ## Commands for running tblgen to compile a td file 3 ########################################################## 4 define transform-td-to-out 5 $(if $(LOCAL_IS_HOST_MODULE), \ 6 $(call transform-host-td-to-out,$(1)), \ 7 $(call transform-device-td-to-out,$(1))) 8 endef 9 10 ########################################################### 11 ## TableGen: Compile .td files to .inc. 12 ########################################################### 13 ifeq ($(LOCAL_MODULE_CLASS),) 14 LOCAL_MODULE_CLASS := STATIC_LIBRARIES 15 endif 16 17 ifneq ($(strip $(TBLGEN_TABLES)),) 18 19 intermediates := $(call local-intermediates-dir) 20 tblgen_gen_tables := $(addprefix $(intermediates)/,$(TBLGEN_TABLES)) 21 LOCAL_GENERATED_SOURCES += $(tblgen_gen_tables) 22 23 tblgen_source_dir := $(LOCAL_PATH) 24 ifneq ($(TBLGEN_TD_DIR),) 25 tblgen_source_dir := $(TBLGEN_TD_DIR) 26 endif 27 28 ifneq ($(filter %GenRegisterNames.inc,$(tblgen_gen_tables)),) 29 $(intermediates)/%GenRegisterNames.inc: TBLGEN_LOCAL_MODULE := $(LOCAL_MODULE) 30 $(intermediates)/%GenRegisterNames.inc: $(tblgen_source_dir)/%.td $(TBLGEN) 31 $(call transform-td-to-out,register-enums) 32 endif 33 34 ifneq ($(filter %GenRegisterInfo.h.inc,$(tblgen_gen_tables)),) 35 $(intermediates)/%GenRegisterInfo.h.inc: TBLGEN_LOCAL_MODULE := $(LOCAL_MODULE) 36 $(intermediates)/%GenRegisterInfo.h.inc: $(tblgen_source_dir)/%.td $(TBLGEN) 37 $(call transform-td-to-out,register-desc-header) 38 endif 39 40 ifneq ($(filter %GenRegisterInfo.inc,$(tblgen_gen_tables)),) 41 $(intermediates)/%GenRegisterInfo.inc: TBLGEN_LOCAL_MODULE := $(LOCAL_MODULE) 42 $(intermediates)/%GenRegisterInfo.inc: $(tblgen_source_dir)/%.td $(TBLGEN) 43 $(call transform-td-to-out,register-desc) 44 endif 45 46 ifneq ($(filter %GenInstrNames.inc,$(tblgen_gen_tables)),) 47 $(intermediates)/%GenInstrNames.inc: TBLGEN_LOCAL_MODULE := $(LOCAL_MODULE) 48 $(intermediates)/%GenInstrNames.inc: $(tblgen_source_dir)/%.td $(TBLGEN) 49 $(call transform-td-to-out,instr-enums) 50 endif 51 52 ifneq ($(filter %GenInstrInfo.inc,$(tblgen_gen_tables)),) 53 $(intermediates)/%GenInstrInfo.inc: TBLGEN_LOCAL_MODULE := $(LOCAL_MODULE) 54 $(intermediates)/%GenInstrInfo.inc: $(tblgen_source_dir)/%.td $(TBLGEN) 55 $(call transform-td-to-out,instr-desc) 56 endif 57 58 ifneq ($(filter %GenAsmWriter.inc,$(tblgen_gen_tables)),) 59 $(intermediates)/%GenAsmWriter.inc: TBLGEN_LOCAL_MODULE := $(LOCAL_MODULE) 60 $(intermediates)/%GenAsmWriter.inc: $(tblgen_source_dir)/%.td $(TBLGEN) 61 $(call transform-td-to-out,asm-writer) 62 endif 63 64 ifneq ($(filter %GenAsmWriter1.inc,$(tblgen_gen_tables)),) 65 $(intermediates)/%GenAsmWriter1.inc: TBLGEN_LOCAL_MODULE := $(LOCAL_MODULE) 66 $(intermediates)/%GenAsmWriter1.inc: $(tblgen_source_dir)/%.td $(TBLGEN) 67 $(call transform-td-to-out,asm-writer -asmwriternum=1) 68 endif 69 70 ifneq ($(filter %GenAsmMatcher.inc,$(tblgen_gen_tables)),) 71 $(intermediates)/%GenAsmMatcher.inc: TBLGEN_LOCAL_MODULE := $(LOCAL_MODULE) 72 $(intermediates)/%GenAsmMatcher.inc: $(tblgen_source_dir)/%.td $(TBLGEN) 73 $(call transform-td-to-out,asm-matcher) 74 endif 75 76 ifneq ($(filter %GenCodeEmitter.inc,$(tblgen_gen_tables)),) 77 $(intermediates)/%GenCodeEmitter.inc: TBLGEN_LOCAL_MODULE := $(LOCAL_MODULE) 78 $(intermediates)/%GenCodeEmitter.inc: $(tblgen_source_dir)/%.td $(TBLGEN) 79 $(call transform-td-to-out,emitter) 80 endif 81 82 ifneq ($(filter %GenMCCodeEmitter.inc,$(tblgen_gen_tables)),) 83 $(intermediates)/%GenMCCodeEmitter.inc: TBLGEN_LOCAL_MODULE := $(LOCAL_MODULE) 84 $(intermediates)/%GenMCCodeEmitter.inc: $(tblgen_source_dir)/%.td $(TBLGEN) 85 $(call transform-td-to-out,emitter -mc-emitter) 86 endif 87 88 ifneq ($(filter %GenMCPseudoLowering.inc,$(tblgen_gen_tables)),) 89 $(intermediates)/%GenMCPseudoLowering.inc: TBLGEN_LOCAL_MODULE := $(LOCAL_MODULE) 90 $(intermediates)/%GenMCPseudoLowering.inc: $(tblgen_source_dir)/%.td $(TBLGEN) 91 $(call transform-td-to-out,pseudo-lowering) 92 endif 93 94 ifneq ($(filter %GenDAGISel.inc,$(tblgen_gen_tables)),) 95 $(intermediates)/%GenDAGISel.inc: TBLGEN_LOCAL_MODULE := $(LOCAL_MODULE) 96 $(intermediates)/%GenDAGISel.inc: $(tblgen_source_dir)/%.td $(TBLGEN) 97 $(call transform-td-to-out,dag-isel) 98 endif 99 100 ifneq ($(filter %GenDisassemblerTables.inc,$(tblgen_gen_tables)),) 101 $(intermediates)/%GenDisassemblerTables.inc: TBLGEN_LOCAL_MODULE := $(LOCAL_MODULE) 102 $(intermediates)/%GenDisassemblerTables.inc: $(tblgen_source_dir)/%.td $(TBLGEN) 103 $(call transform-td-to-out,disassembler) 104 endif 105 106 ifneq ($(filter %GenEDInfo.inc,$(tblgen_gen_tables)),) 107 $(intermediates)/%GenEDInfo.inc: TBLGEN_LOCAL_MODULE := $(LOCAL_MODULE) 108 $(intermediates)/%GenEDInfo.inc: $(tblgen_source_dir)/%.td $(TBLGEN) 109 $(call transform-td-to-out,enhanced-disassembly-info) 110 endif 111 112 ifneq ($(filter %GenFastISel.inc,$(tblgen_gen_tables)),) 113 $(intermediates)/%GenFastISel.inc: TBLGEN_LOCAL_MODULE := $(LOCAL_MODULE) 114 $(intermediates)/%GenFastISel.inc: $(tblgen_source_dir)/%.td $(TBLGEN) 115 $(call transform-td-to-out,fast-isel) 116 endif 117 118 ifneq ($(filter %GenSubtargetInfo.inc,$(tblgen_gen_tables)),) 119 $(intermediates)/%GenSubtargetInfo.inc: TBLGEN_LOCAL_MODULE := $(LOCAL_MODULE) 120 $(intermediates)/%GenSubtargetInfo.inc: $(tblgen_source_dir)/%.td $(TBLGEN) 121 $(call transform-td-to-out,subtarget) 122 endif 123 124 ifneq ($(filter %GenCallingConv.inc,$(tblgen_gen_tables)),) 125 $(intermediates)/%GenCallingConv.inc: TBLGEN_LOCAL_MODULE := $(LOCAL_MODULE) 126 $(intermediates)/%GenCallingConv.inc: $(tblgen_source_dir)/%.td $(TBLGEN) 127 $(call transform-td-to-out,callingconv) 128 endif 129 130 ifneq ($(filter %GenIntrinsics.inc,$(tblgen_gen_tables)),) 131 $(intermediates)/%GenIntrinsics.inc: TBLGEN_LOCAL_MODULE := $(LOCAL_MODULE) 132 $(intermediates)/%GenIntrinsics.inc: $(tblgen_source_dir)/%.td $(TBLGEN) 133 $(call transform-td-to-out,tgt_intrinsics) 134 endif 135 136 ifneq ($(findstring ARMGenDecoderTables.inc,$(tblgen_gen_tables)),) 137 $(intermediates)/ARMGenDecoderTables.inc: TBLGEN_LOCAL_MODULE := $(LOCAL_MODULE) 138 $(intermediates)/ARMGenDecoderTables.inc: $(tblgen_source_dir)/ARM.td $(TBLGEN) 139 $(call transform-td-to-out,arm-decoder) 140 endif 141 142 endif 143
