1 ; RUN: llc -mcpu=cortex-a8 < %s | FileCheck %s 2 3 target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:64:64-v128:128:128-a0:0:32-n32" 4 target triple = "armv7-apple-darwin10" 5 6 %struct.int16x8_t = type { <8 x i16> } 7 %struct.int16x8x2_t = type { [2 x %struct.int16x8_t] } 8 9 define void @t(%struct.int16x8x2_t* noalias nocapture sret %agg.result, <8 x i16> %tmp.0, %struct.int16x8x2_t* nocapture %dst) nounwind { 10 entry: 11 ;CHECK: vtrn.16 12 %0 = shufflevector <8 x i16> %tmp.0, <8 x i16> undef, <8 x i32> <i32 0, i32 0, i32 2, i32 2, i32 4, i32 4, i32 6, i32 6> 13 %1 = shufflevector <8 x i16> %tmp.0, <8 x i16> undef, <8 x i32> <i32 1, i32 1, i32 3, i32 3, i32 5, i32 5, i32 7, i32 7> 14 %agg.result1218.0 = getelementptr %struct.int16x8x2_t* %agg.result, i32 0, i32 0, i32 0, i32 0 ; <<8 x i16>*> 15 store <8 x i16> %0, <8 x i16>* %agg.result1218.0, align 16 16 %agg.result12.1.0 = getelementptr %struct.int16x8x2_t* %agg.result, i32 0, i32 0, i32 1, i32 0 ; <<8 x i16>*> 17 store <8 x i16> %1, <8 x i16>* %agg.result12.1.0, align 16 18 ret void 19 } 20 21 ; Radar 8290937: Ignore undef shuffle indices. 22 ; CHECK: t2 23 ; CHECK: vtrn.16 24 define void @t2(%struct.int16x8x2_t* nocapture %ptr, <4 x i16> %a.0, <4 x i16> %b.0) nounwind { 25 entry: 26 %0 = shufflevector <4 x i16> %a.0, <4 x i16> undef, <8 x i32> <i32 0, i32 0, i32 2, i32 2, i32 undef, i32 undef, i32 undef, i32 undef> 27 %1 = shufflevector <4 x i16> %a.0, <4 x i16> undef, <8 x i32> <i32 1, i32 1, i32 3, i32 3, i32 undef, i32 undef, i32 undef, i32 undef> 28 %ptr26.0 = getelementptr inbounds %struct.int16x8x2_t* %ptr, i32 0, i32 0, i32 0, i32 0 29 store <8 x i16> %0, <8 x i16>* %ptr26.0, align 16 30 %ptr20.1.0 = getelementptr inbounds %struct.int16x8x2_t* %ptr, i32 0, i32 0, i32 1, i32 0 31 store <8 x i16> %1, <8 x i16>* %ptr20.1.0, align 16 32 ret void 33 } 34
