1 ; RUN: llc -O1 -mcpu=cortex-a15 -mtriple=armv7-linux-gnueabi -disable-a15-sd-optimization -verify-machineinstrs < %s | FileCheck -check-prefix=DISABLED %s 2 ; RUN: llc -O1 -mcpu=cortex-a15 -mtriple=armv7-linux-gnueabi -verify-machineinstrs < %s | FileCheck -check-prefix=ENABLED %s 3 4 ; CHECK-ENABLED-LABEL: t1: 5 ; CHECK-DISABLED-LABEL: t1: 6 define <2 x float> @t1(float %f) { 7 ; CHECK-ENABLED: vdup.32 d{{[0-9]*}}, d0[0] 8 ; CHECK-DISABLED-NOT: vdup.32 d{{[0-9]*}}, d0[0] 9 %i1 = insertelement <2 x float> undef, float %f, i32 1 10 %i2 = fadd <2 x float> %i1, %i1 11 ret <2 x float> %i2 12 } 13 14 ; CHECK-ENABLED-LABEL: t2: 15 ; CHECK-DISABLED-LABEL: t2: 16 define <4 x float> @t2(float %g, float %f) { 17 ; CHECK-ENABLED: vdup.32 q{{[0-9]*}}, d0[0] 18 ; CHECK-DISABLED-NOT: vdup.32 d{{[0-9]*}}, d0[0] 19 %i1 = insertelement <4 x float> undef, float %f, i32 1 20 %i2 = fadd <4 x float> %i1, %i1 21 ret <4 x float> %i2 22 } 23 24 ; CHECK-ENABLED-LABEL: t3: 25 ; CHECK-DISABLED-LABEL: t3: 26 define arm_aapcs_vfpcc <2 x float> @t3(float %f) { 27 ; CHECK-ENABLED: vdup.32 d{{[0-9]*}}, d0[0] 28 ; CHECK-DISABLED-NOT: vdup.32 d{{[0-9]*}}, d0[0] 29 %i1 = insertelement <2 x float> undef, float %f, i32 1 30 %i2 = fadd <2 x float> %i1, %i1 31 ret <2 x float> %i2 32 } 33 34 ; CHECK-ENABLED-LABEL: t4: 35 ; CHECK-DISABLED-LABEL: t4: 36 define <2 x float> @t4(float %f) { 37 ; CHECK-ENABLED: vdup.32 d{{[0-9]*}}, d0[0] 38 ; CHECK-DISABLED-NOT: vdup 39 %i1 = insertelement <2 x float> undef, float %f, i32 1 40 br label %b 41 42 ; Block %b has an S-reg as live-in. 43 b: 44 %i2 = fadd <2 x float> %i1, %i1 45 ret <2 x float> %i2 46 } 47 48 ; CHECK-ENABLED-LABEL: t5: 49 ; CHECK-DISABLED-LABEL: t5: 50 define arm_aapcs_vfpcc <4 x float> @t5(<4 x float> %q, float %f) { 51 ; CHECK-ENABLED: vdup.32 d{{[0-9]*}}, d{{[0-9]*}}[0] 52 ; CHECK-ENABLED: vadd.f32 53 ; CHECK-ENABLED-NEXT: bx lr 54 ; CHECK-DISABLED-NOT: vdup 55 %i1 = insertelement <4 x float> %q, float %f, i32 1 56 %i2 = fadd <4 x float> %i1, %i1 57 ret <4 x float> %i2 58 } 59
