Home | History | Annotate | Download | only in ARM
      1 ; RUN: llc < %s -regalloc=greedy -mcpu=cortex-a8 -relocation-model=pic -disable-fp-elim -verify-machineinstrs | FileCheck %s
      2 ;
      3 ; ARM tests that crash or fail with the greedy register allocator.
      4 
      5 target triple = "thumbv7-apple-darwin"
      6 
      7 declare double @exp(double)
      8 
      9 ; CHECK: remat_subreg
     10 define void @remat_subreg(float* nocapture %x, i32* %y, i32 %n, i32 %z, float %c, float %lambda, float* nocapture %ret_f, float* nocapture %ret_df) nounwind {
     11 entry:
     12   %conv16 = fpext float %lambda to double
     13   %mul17 = fmul double %conv16, -1.000000e+00
     14   br i1 undef, label %cond.end.us, label %cond.end
     15 
     16 cond.end.us:                                      ; preds = %entry
     17   unreachable
     18 
     19 cond.end:                                         ; preds = %cond.end, %entry
     20   %mul = fmul double undef, 0.000000e+00
     21   %add = fadd double undef, %mul
     22   %add46 = fadd double undef, undef
     23   %add75 = fadd double 0.000000e+00, undef
     24   br i1 undef, label %for.end, label %cond.end
     25 
     26 for.end:                                          ; preds = %cond.end
     27   %conv78 = sitofp i32 %z to double
     28   %conv83 = fpext float %c to double
     29   %mul84 = fmul double %mul17, %conv83
     30   %call85 = tail call double @exp(double %mul84) nounwind
     31   %mul86 = fmul double %conv78, %call85
     32   %add88 = fadd double 0.000000e+00, %mul86
     33 ; CHECK: blx _exp
     34   %call100 = tail call double @exp(double %mul84) nounwind
     35   %mul101 = fmul double undef, %call100
     36   %add103 = fadd double %add46, %mul101
     37   %mul111 = fmul double undef, %conv83
     38   %mul119 = fmul double %mul111, undef
     39   %add121 = fadd double undef, %mul119
     40   %div = fdiv double 1.000000e+00, %conv16
     41   %div126 = fdiv double %add, %add75
     42   %sub = fsub double %div, %div126
     43   %div129 = fdiv double %add103, %add88
     44   %add130 = fadd double %sub, %div129
     45   %conv131 = fptrunc double %add130 to float
     46   store float %conv131, float* %ret_f, align 4
     47   %mul139 = fmul double %div129, %div129
     48   %div142 = fdiv double %add121, %add88
     49   %sub143 = fsub double %mul139, %div142
     50 ; %lambda is passed on the stack, and the stack slot load is rematerialized.
     51 ; The rematted load of a float constrains the D register used for the mul.
     52 ; CHECK: vldr
     53   %mul146 = fmul float %lambda, %lambda
     54   %conv147 = fpext float %mul146 to double
     55   %div148 = fdiv double 1.000000e+00, %conv147
     56   %sub149 = fsub double %sub143, %div148
     57   %conv150 = fptrunc double %sub149 to float
     58   store float %conv150, float* %ret_df, align 4
     59   ret void
     60 }
     61 
     62 ; CHECK: insert_elem
     63 ; This test has a sub-register copy with a kill flag:
     64 ;   %vreg6:ssub_3<def> = COPY %vreg6:ssub_2<kill>; QPR_VFP2:%vreg6
     65 ; The rewriter must do something sensible with that, or the scavenger crashes.
     66 define void @insert_elem() nounwind {
     67 entry:
     68   br i1 undef, label %if.end251, label %if.then84
     69 
     70 if.then84:                                        ; preds = %entry
     71   br i1 undef, label %if.end251, label %if.then195
     72 
     73 if.then195:                                       ; preds = %if.then84
     74   %div = fdiv float 1.000000e+00, undef
     75   %vecinit207 = insertelement <4 x float> undef, float %div, i32 1
     76   %vecinit208 = insertelement <4 x float> %vecinit207, float 1.000000e+00, i32 2
     77   %vecinit209 = insertelement <4 x float> %vecinit208, float 1.000000e+00, i32 3
     78   %mul216 = fmul <4 x float> zeroinitializer, %vecinit209
     79   store <4 x float> %mul216, <4 x float>* undef, align 16
     80   br label %if.end251
     81 
     82 if.end251:                                        ; preds = %if.then195, %if.then84, %entry
     83   ret void
     84 }
     85 
     86 ; Coalescer failure: removeCopyByCommutingDef leaves a bad kill flag
     87 ; behind.
     88 define void @rdar11950722() nounwind readonly optsize ssp align 2 {
     89 entry:
     90   br i1 undef, label %land.lhs.true7, label %lor.lhs.false.i
     91 
     92 lor.lhs.false.i:
     93   br i1 undef, label %if.then10.i, label %land.lhs.true7
     94 
     95 if.then10.i:
     96   %xFlags.1.i = select i1 undef, i32 0, i32 undef
     97   br i1 undef, label %land.lhs.true33.i, label %f.exit
     98 
     99 land.lhs.true33.i:
    100   %and26.i = and i32 %xFlags.1.i, 8
    101   %cmp27.i = icmp eq i32 %and26.i, 0
    102   %and29.i = and i32 %xFlags.1.i, 2147483645
    103   %xFlags.1.and29.i = select i1 %cmp27.i, i32 %xFlags.1.i, i32 %and29.i
    104   %and34.i = and i32 %xFlags.1.i, 8
    105   %cmp35.i = icmp eq i32 %and34.i, 0
    106   %and37.i = and i32 %xFlags.1.i, 2147483645
    107   %yFlags.1.and37.i = select i1 %cmp35.i, i32 %xFlags.1.i, i32 %and37.i
    108   br label %f.exit
    109 
    110 f.exit:
    111   %xFlags.3.i = phi i32 [ %xFlags.1.and29.i, %land.lhs.true33.i ], [ %xFlags.1.i, %if.then10.i ]
    112   %yFlags.2.i = phi i32 [ %yFlags.1.and37.i, %land.lhs.true33.i ], [ %xFlags.1.i, %if.then10.i ]
    113   %cmp40.i = icmp eq i32 %xFlags.3.i, %yFlags.2.i
    114   br i1 %cmp40.i, label %land.lhs.true7, label %land.end
    115 
    116 land.lhs.true7:
    117   br i1 undef, label %land.lhs.true34, label %lor.lhs.false27
    118 
    119 lor.lhs.false27:
    120   br i1 undef, label %land.lhs.true34, label %land.end
    121 
    122 land.lhs.true34:
    123   br i1 undef, label %land.end, label %lor.lhs.false44
    124 
    125 lor.lhs.false44:
    126   ret void
    127 
    128 land.end:
    129   ret void
    130 }
    131