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      1 ; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=armv7-apple-darwin | FileCheck %s --check-prefix=ARM
      2 ; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=armv7-linux-gnueabi | FileCheck %s --check-prefix=ARM
      3 ; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=thumbv7-apple-darwin | FileCheck %s --check-prefix=THUMB
      4 
      5 %struct.A = type { i32, [2 x [2 x i32]], i8, [3 x [3 x [3 x i32]]] }
      6 %struct.B = type { i32, [2 x [2 x [2 x %struct.A]]] }
      7 
      8 @arr = common global [2 x [2 x [2 x [2 x [2 x i32]]]]] zeroinitializer, align 4
      9 @A = common global [3 x [3 x %struct.A]] zeroinitializer, align 4
     10 @B = common global [2 x [2 x [2 x %struct.B]]] zeroinitializer, align 4
     11 
     12 define i32* @t1() nounwind {
     13 entry:
     14 ; ARM: t1
     15 ; THUMB: t1
     16   %addr = alloca i32*, align 4
     17   store i32* getelementptr inbounds ([2 x [2 x [2 x [2 x [2 x i32]]]]]* @arr, i32 0, i32 1, i32 1, i32 1, i32 1, i32 1), i32** %addr, align 4
     18 ; ARM: add r0, r0, #124
     19 ; THUMB: adds r0, #124
     20   %0 = load i32** %addr, align 4
     21   ret i32* %0
     22 }
     23 
     24 define i32* @t2() nounwind {
     25 entry:
     26 ; ARM: t2
     27 ; THUMB: t2
     28   %addr = alloca i32*, align 4
     29   store i32* getelementptr inbounds ([3 x [3 x %struct.A]]* @A, i32 0, i32 2, i32 2, i32 3, i32 1, i32 2, i32 2), i32** %addr, align 4
     30 ; ARM: movw [[R:r[0-9]+]], #1148
     31 ; ARM: add r0, r{{[0-9]+}}, [[R]]
     32 ; THUMB: addw r0, r0, #1148
     33   %0 = load i32** %addr, align 4
     34   ret i32* %0
     35 }
     36 
     37 define i32* @t3() nounwind {
     38 entry:
     39 ; ARM: t3
     40 ; THUMB: t3
     41   %addr = alloca i32*, align 4
     42   store i32* getelementptr inbounds ([3 x [3 x %struct.A]]* @A, i32 0, i32 0, i32 1, i32 1, i32 0, i32 1), i32** %addr, align 4
     43 ; ARM: add r0, r0, #140
     44 ; THUMB: adds r0, #140
     45   %0 = load i32** %addr, align 4
     46   ret i32* %0
     47 }
     48 
     49 define i32* @t4() nounwind {
     50 entry:
     51 ; ARM: t4
     52 ; THUMB: t4
     53   %addr = alloca i32*, align 4
     54   store i32* getelementptr inbounds ([2 x [2 x [2 x %struct.B]]]* @B, i32 0, i32 0, i32 0, i32 1, i32 1, i32 0, i32 0, i32 1, i32 3, i32 1, i32 2, i32 1), i32** %addr, align 4
     55 ; ARM-NOT: movw r{{[0-9]}}, #1060
     56 ; ARM-NOT: add r{{[0-9]}}, r{{[0-9]}}, #4
     57 ; ARM-NOT: add r{{[0-9]}}, r{{[0-9]}}, #132
     58 ; ARM-NOT: add r{{[0-9]}}, r{{[0-9]}}, #24
     59 ; ARM-NOT: add r{{[0-9]}}, r{{[0-9]}}, #36
     60 ; ARM-NOT: add r{{[0-9]}}, r{{[0-9]}}, #24
     61 ; ARM-NOT: add r{{[0-9]}}, r{{[0-9]}}, #4
     62 ; ARM: movw r{{[0-9]}}, #1284
     63 ; THUMB: addw r{{[0-9]}}, r{{[0-9]}}, #1284
     64   %0 = load i32** %addr, align 4
     65   ret i32* %0
     66 }
     67