1 ; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=armv7-apple-ios | FileCheck %s --check-prefix=ARM 2 ; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=armv7-linux-gnueabi | FileCheck %s --check-prefix=ARM 3 ; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=thumbv7-apple-ios | FileCheck %s --check-prefix=THUMB 4 5 define i32 @VarArg() nounwind { 6 entry: 7 %i = alloca i32, align 4 8 %j = alloca i32, align 4 9 %k = alloca i32, align 4 10 %m = alloca i32, align 4 11 %n = alloca i32, align 4 12 %tmp = alloca i32, align 4 13 %0 = load i32* %i, align 4 14 %1 = load i32* %j, align 4 15 %2 = load i32* %k, align 4 16 %3 = load i32* %m, align 4 17 %4 = load i32* %n, align 4 18 ; ARM: VarArg 19 ; ARM: mov [[FP:r[0-9]+]], sp 20 ; ARM: sub sp, sp, #32 21 ; ARM: movw r0, #5 22 ; ARM: ldr r1, {{\[}}[[FP]], #-4] 23 ; ARM: ldr r2, {{\[}}[[FP]], #-8] 24 ; ARM: ldr r3, {{\[}}[[FP]], #-12] 25 ; ARM: ldr [[Ra:r[0-9]+]], [sp, #16] 26 ; ARM: ldr [[Rb:[lr]+[0-9]*]], [sp, #12] 27 ; ARM: str [[Ra]], [sp] 28 ; ARM: str [[Rb]], [sp, #4] 29 ; ARM: bl {{_?CallVariadic}} 30 ; THUMB: sub sp, #32 31 ; THUMB: movs r0, #5 32 ; THUMB: movt r0, #0 33 ; THUMB: ldr r1, [sp, #28] 34 ; THUMB: ldr r2, [sp, #24] 35 ; THUMB: ldr r3, [sp, #20] 36 ; THUMB: ldr.w {{[a-z0-9]+}}, [sp, #16] 37 ; THUMB: ldr.w {{[a-z0-9]+}}, [sp, #12] 38 ; THUMB: str.w {{[a-z0-9]+}}, [sp] 39 ; THUMB: str.w {{[a-z0-9]+}}, [sp, #4] 40 ; THUMB: bl {{_?}}CallVariadic 41 %call = call i32 (i32, ...)* @CallVariadic(i32 5, i32 %0, i32 %1, i32 %2, i32 %3, i32 %4) 42 store i32 %call, i32* %tmp, align 4 43 %5 = load i32* %tmp, align 4 44 ret i32 %5 45 } 46 47 declare i32 @CallVariadic(i32, ...) 48
