1 ; RUN: llc < %s -march=arm -mattr=+vfp2 | FileCheck %s -check-prefix=VFP2 2 ; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s -check-prefix=NEON 3 ; RUN: llc < %s -mtriple=arm-eabi -mcpu=cortex-a8 | FileCheck %s -check-prefix=A8 4 ; RUN: llc < %s -mtriple=arm-eabi -mcpu=cortex-a8 -regalloc=basic | FileCheck %s -check-prefix=A8 5 ; RUN: llc < %s -mtriple=arm-eabi -mcpu=cortex-a8 --enable-unsafe-fp-math | FileCheck %s -check-prefix=A8U 6 ; RUN: llc < %s -mtriple=arm-darwin -mcpu=cortex-a8 | FileCheck %s -check-prefix=A8U 7 8 define float @t1(float %acc, float %a, float %b) nounwind { 9 entry: 10 ; VFP2-LABEL: t1: 11 ; VFP2: vnmla.f32 12 13 ; NEON-LABEL: t1: 14 ; NEON: vnmla.f32 15 16 ; A8U-LABEL: t1: 17 ; A8U: vnmul.f32 s{{[0-9]}}, s{{[0-9]}}, s{{[0-9]}} 18 ; A8U: vsub.f32 d{{[0-9]}}, d{{[0-9]}}, d{{[0-9]}} 19 20 ; A8-LABEL: t1: 21 ; A8: vnmul.f32 s{{[0-9]}}, s{{[0-9]}}, s{{[0-9]}} 22 ; A8: vsub.f32 s{{[0-9]}}, s{{[0-9]}}, s{{[0-9]}} 23 %0 = fmul float %a, %b 24 %1 = fsub float -0.0, %0 25 %2 = fsub float %1, %acc 26 ret float %2 27 } 28 29 define float @t2(float %acc, float %a, float %b) nounwind { 30 entry: 31 ; VFP2-LABEL: t2: 32 ; VFP2: vnmla.f32 33 34 ; NEON-LABEL: t2: 35 ; NEON: vnmla.f32 36 37 ; A8U-LABEL: t2: 38 ; A8U: vnmul.f32 s{{[01234]}}, s{{[01234]}}, s{{[01234]}} 39 ; A8U: vsub.f32 d{{[0-9]}}, d{{[0-9]}}, d{{[0-9]}} 40 41 ; A8-LABEL: t2: 42 ; A8: vnmul.f32 s{{[01234]}}, s{{[01234]}}, s{{[01234]}} 43 ; A8: vsub.f32 s{{[0-9]}}, s{{[0-9]}}, s{{[0-9]}} 44 %0 = fmul float %a, %b 45 %1 = fmul float -1.0, %0 46 %2 = fsub float %1, %acc 47 ret float %2 48 } 49 50 define double @t3(double %acc, double %a, double %b) nounwind { 51 entry: 52 ; VFP2-LABEL: t3: 53 ; VFP2: vnmla.f64 54 55 ; NEON-LABEL: t3: 56 ; NEON: vnmla.f64 57 58 ; A8U-LABEL: t3: 59 ; A8U: vnmul.f64 d 60 ; A8U: vsub.f64 d 61 62 ; A8-LABEL: t3: 63 ; A8: vnmul.f64 d 64 ; A8: vsub.f64 d 65 %0 = fmul double %a, %b 66 %1 = fsub double -0.0, %0 67 %2 = fsub double %1, %acc 68 ret double %2 69 } 70 71 define double @t4(double %acc, double %a, double %b) nounwind { 72 entry: 73 ; VFP2-LABEL: t4: 74 ; VFP2: vnmla.f64 75 76 ; NEON-LABEL: t4: 77 ; NEON: vnmla.f64 78 79 ; A8U-LABEL: t4: 80 ; A8U: vnmul.f64 d 81 ; A8U: vsub.f64 d 82 83 ; A8-LABEL: t4: 84 ; A8: vnmul.f64 d 85 ; A8: vsub.f64 d 86 %0 = fmul double %a, %b 87 %1 = fmul double -1.0, %0 88 %2 = fsub double %1, %acc 89 ret double %2 90 } 91
