1 ; RUN: llc < %s -march=arm -mattr=+vfp2 | FileCheck %s 2 ; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s 3 ; RUN: llc < %s -march=arm -mcpu=cortex-a8 | FileCheck %s 4 ; RUN: llc < %s -march=arm -mcpu=cortex-a9 | FileCheck %s 5 6 define arm_aapcs_vfpcc float @test1(float %a, float %b) nounwind { 7 ; CHECK: vnmul.f32 s0, s0, s1 8 entry: 9 %0 = fmul float %a, %b 10 %1 = fsub float -0.0, %0 11 ret float %1 12 } 13 14 define arm_aapcs_vfpcc float @test2(float %a, float %b) nounwind { 15 ; CHECK: vnmul.f32 s0, s0, s1 16 entry: 17 %0 = fmul float %a, %b 18 %1 = fmul float -1.0, %0 19 ret float %1 20 } 21 22
