1 ; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s 2 3 ; <rdar://problem/9055897> 4 define <4 x i16> @t1(<4 x i32> %a) nounwind { 5 entry: 6 ; CHECK: vqrshrn.s32 d{{[0-9]+}}, q{{[0-9]*}}, #13 7 %x = tail call <4 x i16> @llvm.arm.neon.vqrshiftns.v4i16(<4 x i32> %a, <4 x i32> <i32 -13, i32 -13, i32 -13, i32 -13>) 8 ret <4 x i16> %x 9 } 10 11 declare <4 x i16> @llvm.arm.neon.vqrshiftns.v4i16(<4 x i32>, <4 x i32>) nounwind readnone 12
