1 ; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s 2 3 %struct.__neon_int8x8x2_t = type { <8 x i8>, <8 x i8> } 4 %struct.__neon_int8x8x3_t = type { <8 x i8>, <8 x i8>, <8 x i8> } 5 %struct.__neon_int8x8x4_t = type { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } 6 7 define <8 x i8> @vtbl1(<8 x i8>* %A, <8 x i8>* %B) nounwind { 8 ;CHECK-LABEL: vtbl1: 9 ;CHECK: vtbl.8 10 %tmp1 = load <8 x i8>* %A 11 %tmp2 = load <8 x i8>* %B 12 %tmp3 = call <8 x i8> @llvm.arm.neon.vtbl1(<8 x i8> %tmp1, <8 x i8> %tmp2) 13 ret <8 x i8> %tmp3 14 } 15 16 define <8 x i8> @vtbl2(<8 x i8>* %A, %struct.__neon_int8x8x2_t* %B) nounwind { 17 ;CHECK-LABEL: vtbl2: 18 ;CHECK: vtbl.8 19 %tmp1 = load <8 x i8>* %A 20 %tmp2 = load %struct.__neon_int8x8x2_t* %B 21 %tmp3 = extractvalue %struct.__neon_int8x8x2_t %tmp2, 0 22 %tmp4 = extractvalue %struct.__neon_int8x8x2_t %tmp2, 1 23 %tmp5 = call <8 x i8> @llvm.arm.neon.vtbl2(<8 x i8> %tmp1, <8 x i8> %tmp3, <8 x i8> %tmp4) 24 ret <8 x i8> %tmp5 25 } 26 27 define <8 x i8> @vtbl3(<8 x i8>* %A, %struct.__neon_int8x8x3_t* %B) nounwind { 28 ;CHECK-LABEL: vtbl3: 29 ;CHECK: vtbl.8 30 %tmp1 = load <8 x i8>* %A 31 %tmp2 = load %struct.__neon_int8x8x3_t* %B 32 %tmp3 = extractvalue %struct.__neon_int8x8x3_t %tmp2, 0 33 %tmp4 = extractvalue %struct.__neon_int8x8x3_t %tmp2, 1 34 %tmp5 = extractvalue %struct.__neon_int8x8x3_t %tmp2, 2 35 %tmp6 = call <8 x i8> @llvm.arm.neon.vtbl3(<8 x i8> %tmp1, <8 x i8> %tmp3, <8 x i8> %tmp4, <8 x i8> %tmp5) 36 ret <8 x i8> %tmp6 37 } 38 39 define <8 x i8> @vtbl4(<8 x i8>* %A, %struct.__neon_int8x8x4_t* %B) nounwind { 40 ;CHECK-LABEL: vtbl4: 41 ;CHECK: vtbl.8 42 %tmp1 = load <8 x i8>* %A 43 %tmp2 = load %struct.__neon_int8x8x4_t* %B 44 %tmp3 = extractvalue %struct.__neon_int8x8x4_t %tmp2, 0 45 %tmp4 = extractvalue %struct.__neon_int8x8x4_t %tmp2, 1 46 %tmp5 = extractvalue %struct.__neon_int8x8x4_t %tmp2, 2 47 %tmp6 = extractvalue %struct.__neon_int8x8x4_t %tmp2, 3 48 %tmp7 = call <8 x i8> @llvm.arm.neon.vtbl4(<8 x i8> %tmp1, <8 x i8> %tmp3, <8 x i8> %tmp4, <8 x i8> %tmp5, <8 x i8> %tmp6) 49 ret <8 x i8> %tmp7 50 } 51 52 define <8 x i8> @vtbx1(<8 x i8>* %A, <8 x i8>* %B, <8 x i8>* %C) nounwind { 53 ;CHECK-LABEL: vtbx1: 54 ;CHECK: vtbx.8 55 %tmp1 = load <8 x i8>* %A 56 %tmp2 = load <8 x i8>* %B 57 %tmp3 = load <8 x i8>* %C 58 %tmp4 = call <8 x i8> @llvm.arm.neon.vtbx1(<8 x i8> %tmp1, <8 x i8> %tmp2, <8 x i8> %tmp3) 59 ret <8 x i8> %tmp4 60 } 61 62 define <8 x i8> @vtbx2(<8 x i8>* %A, %struct.__neon_int8x8x2_t* %B, <8 x i8>* %C) nounwind { 63 ;CHECK-LABEL: vtbx2: 64 ;CHECK: vtbx.8 65 %tmp1 = load <8 x i8>* %A 66 %tmp2 = load %struct.__neon_int8x8x2_t* %B 67 %tmp3 = extractvalue %struct.__neon_int8x8x2_t %tmp2, 0 68 %tmp4 = extractvalue %struct.__neon_int8x8x2_t %tmp2, 1 69 %tmp5 = load <8 x i8>* %C 70 %tmp6 = call <8 x i8> @llvm.arm.neon.vtbx2(<8 x i8> %tmp1, <8 x i8> %tmp3, <8 x i8> %tmp4, <8 x i8> %tmp5) 71 ret <8 x i8> %tmp6 72 } 73 74 define <8 x i8> @vtbx3(<8 x i8>* %A, %struct.__neon_int8x8x3_t* %B, <8 x i8>* %C) nounwind { 75 ;CHECK-LABEL: vtbx3: 76 ;CHECK: vtbx.8 77 %tmp1 = load <8 x i8>* %A 78 %tmp2 = load %struct.__neon_int8x8x3_t* %B 79 %tmp3 = extractvalue %struct.__neon_int8x8x3_t %tmp2, 0 80 %tmp4 = extractvalue %struct.__neon_int8x8x3_t %tmp2, 1 81 %tmp5 = extractvalue %struct.__neon_int8x8x3_t %tmp2, 2 82 %tmp6 = load <8 x i8>* %C 83 %tmp7 = call <8 x i8> @llvm.arm.neon.vtbx3(<8 x i8> %tmp1, <8 x i8> %tmp3, <8 x i8> %tmp4, <8 x i8> %tmp5, <8 x i8> %tmp6) 84 ret <8 x i8> %tmp7 85 } 86 87 define <8 x i8> @vtbx4(<8 x i8>* %A, %struct.__neon_int8x8x4_t* %B, <8 x i8>* %C) nounwind { 88 ;CHECK-LABEL: vtbx4: 89 ;CHECK: vtbx.8 90 %tmp1 = load <8 x i8>* %A 91 %tmp2 = load %struct.__neon_int8x8x4_t* %B 92 %tmp3 = extractvalue %struct.__neon_int8x8x4_t %tmp2, 0 93 %tmp4 = extractvalue %struct.__neon_int8x8x4_t %tmp2, 1 94 %tmp5 = extractvalue %struct.__neon_int8x8x4_t %tmp2, 2 95 %tmp6 = extractvalue %struct.__neon_int8x8x4_t %tmp2, 3 96 %tmp7 = load <8 x i8>* %C 97 %tmp8 = call <8 x i8> @llvm.arm.neon.vtbx4(<8 x i8> %tmp1, <8 x i8> %tmp3, <8 x i8> %tmp4, <8 x i8> %tmp5, <8 x i8> %tmp6, <8 x i8> %tmp7) 98 ret <8 x i8> %tmp8 99 } 100 101 declare <8 x i8> @llvm.arm.neon.vtbl1(<8 x i8>, <8 x i8>) nounwind readnone 102 declare <8 x i8> @llvm.arm.neon.vtbl2(<8 x i8>, <8 x i8>, <8 x i8>) nounwind readnone 103 declare <8 x i8> @llvm.arm.neon.vtbl3(<8 x i8>, <8 x i8>, <8 x i8>, <8 x i8>) nounwind readnone 104 declare <8 x i8> @llvm.arm.neon.vtbl4(<8 x i8>, <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8>) nounwind readnone 105 106 declare <8 x i8> @llvm.arm.neon.vtbx1(<8 x i8>, <8 x i8>, <8 x i8>) nounwind readnone 107 declare <8 x i8> @llvm.arm.neon.vtbx2(<8 x i8>, <8 x i8>, <8 x i8>, <8 x i8>) nounwind readnone 108 declare <8 x i8> @llvm.arm.neon.vtbx3(<8 x i8>, <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8>) nounwind readnone 109 declare <8 x i8> @llvm.arm.neon.vtbx4(<8 x i8>, <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8>) nounwind readnone 110
