1 ; RUN: llc -march=mipsel -mcpu=mips16 -relocation-model=pic < %s | FileCheck %s -check-prefix=16 2 3 @t = global i32 10, align 4 4 @f = global i32 199, align 4 5 @a = global i32 1, align 4 6 @b = global i32 10, align 4 7 @c = global i32 1, align 4 8 @z1 = common global i32 0, align 4 9 @z2 = common global i32 0, align 4 10 @z3 = common global i32 0, align 4 11 @z4 = common global i32 0, align 4 12 @.str = private unnamed_addr constant [9 x i8] c"%i = %i\0A\00", align 1 13 14 define i32 @calc_z() nounwind "target-cpu"="mips16" "target-features"="+mips16,+o32" { 15 entry: 16 %retval = alloca i32, align 4 17 %0 = load i32* @a, align 4 18 %1 = load i32* @b, align 4 19 %cmp = icmp sgt i32 %0, %1 20 br i1 %cmp, label %cond.true, label %cond.false 21 22 cond.true: ; preds = %entry 23 %2 = load i32* @f, align 4 24 br label %cond.end 25 26 cond.false: ; preds = %entry 27 %3 = load i32* @t, align 4 28 br label %cond.end 29 30 cond.end: ; preds = %cond.false, %cond.true 31 %cond = phi i32 [ %2, %cond.true ], [ %3, %cond.false ] 32 store i32 %cond, i32* @z1, align 4 33 %4 = load i32* @b, align 4 34 %5 = load i32* @a, align 4 35 %cmp1 = icmp sgt i32 %4, %5 36 br i1 %cmp1, label %cond.true2, label %cond.false3 37 38 cond.true2: ; preds = %cond.end 39 %6 = load i32* @t, align 4 40 br label %cond.end4 41 42 cond.false3: ; preds = %cond.end 43 %7 = load i32* @f, align 4 44 br label %cond.end4 45 46 cond.end4: ; preds = %cond.false3, %cond.true2 47 %cond5 = phi i32 [ %6, %cond.true2 ], [ %7, %cond.false3 ] 48 store i32 %cond5, i32* @z2, align 4 49 %8 = load i32* @c, align 4 50 %9 = load i32* @a, align 4 51 %cmp6 = icmp sgt i32 %8, %9 52 br i1 %cmp6, label %cond.true7, label %cond.false8 53 54 cond.true7: ; preds = %cond.end4 55 %10 = load i32* @f, align 4 56 br label %cond.end9 57 58 cond.false8: ; preds = %cond.end4 59 %11 = load i32* @t, align 4 60 br label %cond.end9 61 62 cond.end9: ; preds = %cond.false8, %cond.true7 63 %cond10 = phi i32 [ %10, %cond.true7 ], [ %11, %cond.false8 ] 64 store i32 %cond10, i32* @z3, align 4 65 %12 = load i32* @a, align 4 66 %13 = load i32* @c, align 4 67 %cmp11 = icmp sgt i32 %12, %13 68 br i1 %cmp11, label %cond.true12, label %cond.false13 69 70 cond.true12: ; preds = %cond.end9 71 %14 = load i32* @f, align 4 72 br label %cond.end14 73 74 cond.false13: ; preds = %cond.end9 75 %15 = load i32* @t, align 4 76 br label %cond.end14 77 78 cond.end14: ; preds = %cond.false13, %cond.true12 79 %cond15 = phi i32 [ %14, %cond.true12 ], [ %15, %cond.false13 ] 80 store i32 %cond15, i32* @z4, align 4 81 %16 = load i32* %retval 82 ret i32 %16 83 } 84 85 ; 16: slt ${{[0-9]+}}, ${{[0-9]+}} 86 ; 16: bteqz $BB{{[0-9]+}}_{{[0-9]}} 87 88 ; 16: slt ${{[0-9]+}}, ${{[0-9]+}} 89 ; 16: bteqz $BB{{[0-9]+}}_{{[0-9]}} 90 91 ; 16: slt ${{[0-9]+}}, ${{[0-9]+}} 92 ; 16: bteqz $BB{{[0-9]+}}_{{[0-9]}} 93 94 ; 16: slt ${{[0-9]+}}, ${{[0-9]+}} 95 ; 16: bteqz $BB{{[0-9]+}}_{{[0-9]}} 96 97 attributes #0 = { nounwind "target-cpu"="mips16" "target-features"="+mips16,+o32" } 98 attributes #1 = { "target-cpu"="mips16" "target-features"="+mips16,+o32" } 99
