1 ; RUN: llc < %s -march=r600 -mcpu=cayman | FileCheck %s 2 3 ;CHECK: DOT4 T{{[0-9]\.X}} 4 ;CHECK: MULADD_IEEE * T{{[0-9]\.W}} 5 6 define void @main() #0 { 7 main_body: 8 %0 = call float @llvm.R600.load.input(i32 4) 9 %1 = call float @llvm.R600.load.input(i32 5) 10 %2 = call float @llvm.R600.load.input(i32 6) 11 %3 = call float @llvm.R600.load.input(i32 8) 12 %4 = call float @llvm.R600.load.input(i32 9) 13 %5 = call float @llvm.R600.load.input(i32 10) 14 %6 = call float @llvm.R600.load.input(i32 12) 15 %7 = call float @llvm.R600.load.input(i32 13) 16 %8 = call float @llvm.R600.load.input(i32 14) 17 %9 = load <4 x float> addrspace(8)* null 18 %10 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 1) 19 %11 = call float @llvm.AMDGPU.dp4(<4 x float> %9, <4 x float> %9) 20 %12 = fmul float %0, %3 21 %13 = fadd float %12, %6 22 %14 = fmul float %1, %4 23 %15 = fadd float %14, %7 24 %16 = fmul float %2, %5 25 %17 = fadd float %16, %8 26 %18 = fmul float %11, %11 27 %19 = fadd float %18, %0 28 %20 = insertelement <4 x float> undef, float %13, i32 0 29 %21 = insertelement <4 x float> %20, float %15, i32 1 30 %22 = insertelement <4 x float> %21, float %17, i32 2 31 %23 = insertelement <4 x float> %22, float %19, i32 3 32 %24 = call float @llvm.AMDGPU.dp4(<4 x float> %23, <4 x float> %10) 33 %25 = insertelement <4 x float> undef, float %24, i32 0 34 call void @llvm.R600.store.swizzle(<4 x float> %25, i32 0, i32 2) 35 ret void 36 } 37 38 ; Function Attrs: readnone 39 declare float @llvm.R600.load.input(i32) #1 40 41 ; Function Attrs: readnone 42 declare float @llvm.AMDGPU.dp4(<4 x float>, <4 x float>) #1 43 44 45 declare void @llvm.R600.store.swizzle(<4 x float>, i32, i32) 46 47 attributes #0 = { "ShaderType"="1" } 48 attributes #1 = { readnone } 49 attributes #2 = { readonly } 50 attributes #3 = { nounwind readonly } 51
