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N 0L B N pL V L l L L N M N 0M @ N PM N pM N M N M O M R vP N tP @N `sP N N N output_1833 output_1832 output_1831 output_1830 output_1829 output_1828 output_1788 output_885 output_884 output_883 output_882 output_881 output_880 output_879 output_878 output_877 output_876 output_875 output_874 output_873 output_872 output_871 output_870 output_869 output_868 output_867 output_866 ( 7 output_733 output_714 output_499 output_400 output_399 output_398 output_397 output_396 output_395 output_394 output_393 output_392 output_391 output_390 output_389 output_388 output_387 output_386 output_291 output_290 output_219 output_218 output_217 output_216 output_215 output_214 output_213 output_212 output_211 output_210 output_209 output_208 output_207 output_206 output_205 output_204 output_203 output_202 output_201 output_200 output_199 output_198 output_197 output_109 output_108 output_102 output_97 output_80 output_79 output_78 output_77 output_76 output_75 output_74 output_73 output_72 output_71 output_70 output_69 output_52 output_50 output_48 output_47 F #"l " U T #"l " [ T #"l " [ T #"l " [ T #"l " " a " " g " " m " .T s " y :T $ T #"l :T $ " | :T $ :T $ " " T #"l " " ( " ( " " & " W & " " ' " W ' " " " " " " e $T #"l " " " e $T #"l " " ; " x " = " K " 8T " 8T " =T " =T " 0 " m " T #"l " p " #"l " ;T " ;T " ` " " " " " " " " " " " " " " " " " " " " T #"l " T #"l " :T $ " :T $ " :T " :T :T " | :T " $ " ) 8T ) " $ ( 8T ) ( " . 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' " F ' `#T #"l ' " 8 & " N & " F & `#T #"l & " 8 ' " N ' " F ' `#T #"l ' " } & " K & " } & " = & " K & `#T #"l & " } ' " = ' " K ' `#T #"l ' " } & " `&t & " K & `#T #"l & " } ' " `&t ' " K ' `#T #"l ' " & " U & " P & `#T #"l & " ' " U ' " P ' `#T #"l ' " & " " & `#T #"l & " ' " " ' `#T #"l ' " & " " & `#T #"l & " ' " " ' `#T #"l ' " & " & " `#T #"l & " ' " ' " `#T #"l ' " & " & " `#T #"l & " ' " ' " `#T #"l ' " ' " P & " Z ' `#T #"l ' " ' " Z ' " P & `#T #"l ' " ' " Z & " P & `#T #"l ' " ( " *t ( " ( `#T #"l ( " ( " Z ( " ^ ( `#T #"l ( " ( " " ( `#T #"l ( " ( " " ( `#T #"l ( " ( " ( " `#T #"l ( " ( " ( " `#T #"l ( " ( " P & " Z ( `#T #"l ( " ( " P ' " Z ( `#T #"l ( " ( " Z ( " P & `#T #"l ( " ( " Z ( " P ' `#T #"l ( " ( " Z & " P & `#T #"l ( " ( " Z ' " P ' `#T #"l ( " } ' " K ' " ( " b ( " `&t ( " ' ( " ( " b ( " `&t & " ( " b ( " `&t ' " ( " b ( " `&t ( 0 " |n ( " & " b ( " `&t & 0 " |n & " ' " b ( " `&t ' 0 " |n ' " ( " `&t ( " m ( " e ( " ( " `&t & " m & " e ( " ( " `&t ' " m ' " e ( " ( " `&t & " m ( " e ( " ( " `&t ' " m ( " e ( " } & " = & T O " } ' " = ' T O " #"l " #"l ( " " ( " ( " " ( " " ( " " ( " " ( " " ( " " " ( " " #"l ( " #"l ( " ( " `&t ( " e " e " #"l " #"l ( " #"l " #"l ( " " ( " e " e " ( " " ( " " " " ( " " ( " e " e " " ( " e " e " " ( " " " " " ( " " " " #"l " #"l & " #"l " #"l ' " " = ' " h " k " `&t " ' " h " k " & " `&t " ' " r " h " `&t " " h " `&t " " h " `&t " " h " & " " `&t " ' " h " & " " `&t " ' " k " h " & " ' t " `&t " ' " r " n " h " " ' t " `&t " ' " 0T #"l " ; .T #"l " " c " ; .T #"l " " c " ; .T #"l " r " v PAT #"l " ( 0T #"l " ^ ( " Z ( " z ' 0T #"l " ' " ' " & 0T #"l " & " & " } & " = & " = & " = & " } ' " = ' " = ' " = ' " ; " v " " " `&t " 9 " " `&t " " `&t " " `&t p " O #"l @9T #"l " ' t p " #"l #"l @8T #"l " p " #"l #"l p T #"l #"l p " #"l #"l @9T #"l p " #"l #"l @8T #"l p " #"l " u p p " #"l " u p p " O " " e " " p " ' t " PAT #"l " e " e " PAT #"l " e p " ' t " " " `&t " " " `&t " " " `&t " " " k " " & " 9 " p " ' t " x ; ;T ; " x < ;T < " x = ;T = " x > ;T > " ; ;T ; " < ;T < " = ;T = " > ;T > " N ;T D N " " w " N " *t N " N " N " N " N " N " `&t N " N " N " N " = " *t N " N " = " `&t N " N " = " N " N " = " N " `&t & " N " c & ;T & " & " N " & " N " ; " *t ; " ; " ; " `&t ; " ; " < " *t < " < " < " `&t < " < " = " *t = " = " = " `&t = " = " > " *t > " > " > " `&t > " > " = " *t < " < " > " *t = " = " < " `&t < " " = " `&t = " " > " `&t > " " ; " `&t ; " ; " < " `&t < " < " = " `&t = " = " ; " `&t < " < " < " `&t = " = " < " `&t < " " `&t ; " ; " " w ; " Vq " w ; " w ; %T #"l " ? ;T ? " @ ;T @ " A ;T A " B ;T B " C ;T C " O ;T O " P ;T P " D ;T D " E ;T E " F ;T F " G ;T G " Q ;T Q " R ;T R " & A " 0 " , A " 2 O " O " 2 P " P " 2 Q " Q " 2 R " R " } B " K B " 2 D " D " 2 ? " ? " O " = O " P " = P " Q " = Q " R " = R " G " = G " B " = B " " 9 " } D " e D " } ? " e ? " O " O " O P%T #"l O " P " P " P P%T #"l P " Q " Q " Q P%T #"l Q " R " R " R P%T #"l R " O " I O " M O P%T #"l O " P " I P " M P P%T #"l P " } O " m O " K O " } O " = O " K O " } P " m P " K P " } P " = P " K P " } Q " m Q " K Q " } Q " = Q " K Q " } R " m R " K R " } R " = R " K R " } O " *t O " K O " } O " `&t O " K O " } P " *t P " K P " } P " `&t P " K P " } O " = O " K O " } P " = P " K P " } O " `&t O " K O " } P " `&t P " K P " } Q " = Q " K Q " } R " = R " K R " } Q " K Q " } O " K O " = O " } O " K O " `&t O " } R " K R " } P " K P " = P " } P " K P " `&t P " } O " = O " K O 0 T O " } P " = P " K P 0 T O " } Q " = Q " K Q 0 T O " } R " = R " K R 0 T O " } O " = O " K O "T #"l O " } P " = P " K P "T #"l P " } Q " = Q " K Q "T #"l Q " } R " = R " K R "T #"l R " } & " `&t & " K & !T #"l & " } ' " `&t ' " K ' !T #"l ' " } O " `&t O " K O !T #"l O " } P " `&t P " K P !T #"l P " } O " = O " K O !T #"l O " } P " = P " K P !T #"l P " } & " `&t & " = & " } ' " `&t ' " = ' " & " 7 & " & " & " ' " 7 ' " ' " ' " O " 7 O " O " O " P " 7 P " P " P " Q " 7 Q " Q " Q " R " 7 R " R " R " O " 7 O " O " O T #"l O " P " 7 P " P " P T #"l P " q & " < & " C & " K & " q ' " < ' " C ' " K ' " q O " < O " C O " K O " q P " < P " C P " K P " q Q " < Q " C Q " K Q " q R " < R " C R " K R " } O " `&t O " = " = " K O " } O " = O " " O " O " 0 " ; " O " } O " K A " } Q " K F " } A " K O " } F " K Q " P " = " = " K P " } P " = P " " P " P " 0 " ; " P " } R " K A " } R " K F " } P " K A " } A " K R " } A " K P T #"l = " } O " = O " K P " O " O " P " } P " = P " K O " P " P " O " } O " K R " } O " K P T #"l N " } R " K O " } R " K Q " } P " K O " O " 1 O " J O " O " O " J O " R O " 1 O " Y O " R O " O " Y O " } Q " = Q " K Q T #"l T #"l T #"l T #"l T #"l T #"l !T #"l !T #"l " } O " = O " K O T #"l T #"l T #"l T #"l " } A " = A " K A T #"l T #"l T #"l T #"l " } O " `&t O " K O T #"l T #"l T #"l T #"l " } A " `&t A " K A T #"l T #"l T #"l T #"l " _ N " > O " R O " 1 O " ` N " R O " O " ` N " _ N " a O " O " 1 O " Y N " O " = O " f N " } O " = O " = O " } O " `&t O " = O " O " & " } O " `&t & " l N " y & ;T & " l N " & ;T & " N " & `6T & " O " 8 N " N " O " N " N " O ;T O " & " A ;T A " " O ;T O " & " A ;T A " " O ;T O " & " A ;T A " " / O ;T O " : & " / A ;T A " : " } O " = O " K & P " _ ' " a P " P " # P " - P " 7 P " D P " P P " } P " K ' " } P " `&t ' " q P " a ' ;T \ ' " b P " p ' ;T z ' " } ? " m ? " K ? " } ? " = ? " K ? " } @ " m @ " K @ " } @ " = @ " K @ " } A " m A " K A " } A " = A " K A " } B " m B " K B " } B " = B " K B " } ? " *t ? " K ? " } ? " `&t ? " K ? " } @ " *t @ " K @ " } @ " `&t @ " K @ " } A " *t A " K A " } A " `&t A " K A " } B " *t B " K B " } B " `&t B " K B " #"l ? " #"l ? " #"l ? " } B " m A " K A " } B " *t A " K A " } A " m @ " K @ " } A " *t @ " K @ " #"l A " #"l A " #"l A " #"l B " #"l B " #"l B " } @ " = @ " " } A " = A " " } @ " `&t @ " " } A " `&t A " " } C " = C T O " } B " = B " " } C " `&t C T O " } B " `&t B " " } ? " = ? " K ? " } @ " = @ " K @ " } ? " `&t ? " K ? " } @ " `&t @ " K @ " } D " = D " K D " } E " = E " K E " } F " = F " K F " } G " = G " K G " } ) " `&t ) " K ) " } D " m D " K D " } E " m E " K E " } F " m F " K F " } G " m G " K G " } ) " *t ) " K ) " } ? " = @ " K @ " } ? " `&t @ " K @ " } @ " = A " K A " } @ " `&t A " K A " } ? " = ? " pCT O " } @ " = @ " CT O " } A " = A " B " _ " B " A " " A " " B " " B " " B " " l = " ;T " l = " ;T " = " `6T " = " `6T " A " 8 = " = " A " = " I = " B " ;T ! " ) B " 8 ;T E " } B " = ? " K ? " } B " `&t ? " K ? " " = Q " " = R " " = O " " = P " Vq " = ? " = ? " u p " " k " " } @ " = ? " K ? " } @ " `&t ? " K ? " < " `&t ; " ; " } " = " K T O " } " `&t " K T O " " `&t " T O " } ? " K ? " ; " ; " & " = & " ' " = ' " & " = O " ' " = P " } B " `&t B p T #"l p T #"l " } B " `&t B " = ? " } B " `&t B " = B p T #"l p T #"l " } O " = O " K O T O " } P " = P " K P T O " } Q " = Q " K Q p T O " } R " = R " K R T O " } O " = O " K O " = O " } P " = P " K P " = P " } Q " = Q " K Q " = Q " } R " = R " K R " = R " } O " `&t O " K O T O " } P " `&t P " K P T O :T } O :T `&t O p:T K O " Y O :T } P :T `&t P p:T K P " Y P " } O " m O " K O p T O " } P " m P " K P p T O " } Q " m Q " K Q p T O " } R " m R " K R p T O " } O " *t O " K O p T O " } P " *t P " K P p T O " } B " e B " } ? " = ? " K ? p T O " } ? " `&t ? " K ? p T O " } ? " = ? " K ? " = ? :T } ? :T `&t ? p:T K ? " Y ? " } @ " = @ " K @ p T O " } @ " `&t @ " K @ p T O " } @ " K ? " } A " K ? " } A " K @ " } B " K ? " } B " K @ " } B " K A " } Q " K Q T O " } R " K R T O " } O " K O T O " } P " K P T O " } O " = O " = O T O " } P " = P " = P T O " } O " `&t O " = O T O " } P " `&t P " = P T O " P " U ? :T 8 ? " t p:T ? " p T " P " 8 ? " t " ? " p T " U ? " 8 ? " t " ? " p T " \ ? " g " n ? " p " x ? " p T " P " U ? :T 8 ? p:T ? p T " P " 8 ? " ? p T " U ? " 8 ? " ? p T " \ ? " g " n ? " x ? p T " } @ " m @ " K @ " = @ " } A " m A " K A " = A " } B " m A " K A " = B " B " m A " K A " } A " m @ " K @ " = A " ? " 8 ? " ? " ? " @ " 8 @ " @ " @ " A " 8 A " A " A " B " 8 B " B " B " O " 8 O " O " O " P " 8 P " P " P " D " 8 D " D " D " E " 8 E " E " E " F " 8 F " F " F " G " 8 G " G " G " Q " 8 Q " Q " Q " R " 8 R " R " R " ? " 8 ? " ? " ? " A " 8 B " B " ? " @ " 8 A " A " ? " ? " 8 @ " @ " ? " } ? " K ? T O " } @ " K @ T O " } A " K A 0 T O " } B " K B P T O " ? " ? " ? " @ " @ " @ " A " A " A " B " B " B " } O " K O T #"l O " } P " K P T #"l P " } ? `"T #"l ? " = ? " K ? " } @ `"T #"l @ " = @ " K @ " } A `"T #"l A " = A " K A " } B `"T #"l B " = B " K B " } ? "T #"l ? " = ? " K ? " } @ "T #"l @ " = @ " K @ " } A "T #"l A " = A " K A " } B "T #"l B " = B " K B " } ? " = ? " K ? p " O " } @ " = @ " K @ p " O " } A " = A " K A p " O " } B " = B " K B p " O " } O " = O " m O " K A T O " } P " = P " m P " K B T O " } Q " = Q " m Q " K F T O " } R " = R " m R " K G T O " } B " K B p T O " } B " = B " K B p T O " } B " `&t B " K B p T O &T #"l " F " " Q " & " G " " R " ' " q D " ? " q E " @ " q F " A " q G " B " q Q " O " q R " P " q O " O &T #"l p " " q Q " Q &T #"l p " " q R " R &T #"l p " " } O " K O ,T #"l p " #"l " } P " K P ,T #"l p " #"l " } Q " K Q -T #"l p " #"l " } R " K R 0-T #"l p " #"l " } O " = O " K A " } P " = P " K B " } Q " = Q " K F " } R " = R " K G " } F " = F " K F p T O " } R " = R " K R p T O " } F " = F " K F +T #"l p " #"l " } Q " = Q " K Q @,T #"l p " #"l " } R " = R " K R +T #"l p " #"l " } G " = G " K B " } R " = R " K P " } F " = F " K A " } Q " = Q " K O " } E " = E " K @ " } D " = D " K ? " } O " e O " = A " } P " e P " = B " } Q " e Q " = F " } R " e R " = G " O " = A " = O " P " = B " = P " Q " = F " = Q " R " = G " = R " 2 F " A " 2 Q " O " 2 R " P " D " 8 ? ;T ? " E " 8 @ ;T @ " F " 8 A ;T A " G " 8 B ;T B " Q " 8 O ;T O " R " 8 P ;T P " } O " = @ " } O " e < " } Q " K @ " } @ " = O p T n T #"l < " < " = O p T n " @ " = Q p T n " " " " " " " " 9 " " " " 9 " " " Tn " l " k " 1T " Tn " l " k " V " " `&t " " " `&t " " " `&t " V " " `&t " " " `&t " " " `&t " " " " " " L " #"l " #"l " #"l #"l " #"l " #"l " #"l #"l " #"l " #"l " #"l #"l " #"l " #"l .T #"l #"l " #"l " #"l " #"l " #"l " #"l " #"l " #"l " #"l " #"l " #"l " #"l " #"l :T #"l " #"l P/T #"l " #"l ( " #"l ( #"l " #"l P/T #"l " #"l ( " #"l ( P/T #"l @.T #"l & @.T #"l & #"l P/T #"l @.T #"l ' @.T #"l ' #"l " #"l P/T #"l @.T #"l & @.T #"l & " #"l P/T #"l @.T #"l ' @.T #"l ' " #"l PAT #"l T #"l #"l " #"l " #"l PAT #"l T #"l " #"l " #"l T #"l " #"l " #"l ( " #"l ( " #"l " #"l & " #"l & " #"l " #"l ' " #"l ' " #"l " #"l " #"l " #"l " #"l " #"l $T #"l " #"l " #"l " #"l $T #"l " #"l " #"l " #"l " #"l " #"l " #"l " #"l 0 " #"l 0 " #"l " #"l " #"l " #"l " #"l " #"l " #"l " #"l :T #"l " #"l " #"l ) AT #"l ) " #"l ) " #"l ) " #"l ( BT #"l ( " #"l ( " #"l ( " #"l ' CT #"l ' " #"l ' " #"l ' " #"l & " #"l & " #"l & CT #"l & " #"l ) " #"l ) " #"l & " #"l & " #"l ' " #"l ' " #"l ( " #"l ( " #"l ) " #"l ) " #"l " #"l " #"l & " #"l & " #"l ' " #"l ' " #"l ( " #"l ( " #"l " #"l " #"l " #"l " #"l " #"l " #"l " #"l " #"l " #"l " #"l " #"l " #"l " #"l " #"l " #"l " #"l " #"l " #"l " #"l " #"l " #"l " #"l " #"l ' BT #"l & " #"l ( BT #"l & " #"l ( BT #"l ' " #"l ' " #"l & " #"l ' " #"l & " #"l ( " #"l & " #"l ( " #"l ' " #"l & " #"l ' " #"l & " #"l ' #"l & #"l ' #"l & " #"l & BT #"l ' #"l " #"l & " #"l ( " #"l ' " #"l ( " #"l & " #"l ( " #"l & " #"l ' " #"l ( " #"l ' " #"l & " #"l ( " #"l & " #"l ' " #"l ( " #"l ' " #"l " #"l & " #"l " #"l ' " #"l " #"l & " #"l " #"l ' " #"l " #"l & " #"l " #"l ' " #"l " #"l & #"l " #"l O " #"l O " #"l " #"l ' #"l " #"l P " #"l P " #"l " #"l O " #"l O " #"l & " #"l O " #"l " #"l P " #"l P " #"l ' " #"l P " #"l " #"l & " #"l " #"l ' " #"l & " #"l & " #"l " #"l ' " #"l ' " #"l " #"l & " #"l & " #"l " #"l ' " #"l ' " #"l " #"l " #"l ' " " ' " #"l " #"l ' " " ' " #"l " #"l & " = & " #"l " #"l & " = & " #"l " #"l " #"l " #"l " #"l " #"l " #"l " #"l " #"l " #"l " #"l " #"l " #"l " #"l " #"l " #"l " #"l " #"l " #"l " #"l " #"l " #"l " #"l " #"l " #"l " #"l " #"l " #"l " #"l " #"l " #"l " #"l " #"l " #"l " #"l " #"l " #"l " #"l " #"l " #"l " #"l " #"l " #"l " #"l " #"l " #"l " #"l " #"l " #"l " #"l " #"l " #"l " #"l " #"l " #"l " #"l " #"l ( " #"l " #"l & " #"l " #"l " #"l ' " #"l " #"l " #"l ( " #"l " #"l " #"l & " #"l " #"l " #"l ' " #"l " #"l " #"l ( " #"l " #"l " #"l ' " #"l " #"l ( " #"l " #"l & " #"l " #"l " #"l ' " #"l " #"l " #"l & " #"l " #"l " #"l ' " #"l " #"l " #"l & " #"l " #"l " #"l ' " #"l " #"l " #"l ( " #"l " #"l " #"l & " #"l " #"l " #"l ' " #"l " #"l " #"l ( " #"l " #"l " #"l ( " #"l " #"l " #"l & " #"l " #"l " #"l ' " #"l " #"l " #"l ( " #"l " #"l " #"l & " #"l " #"l " #"l A " #"l A " #"l ' " #"l " #"l " #"l A " #"l A " #"l ( " #"l " #"l " #"l A " #"l A " #"l & " #"l " #"l " #"l A " #"l A " #"l ' " #"l " #"l " #"l A " #"l A " #"l ( " #"l " #"l " #"l A " #"l A " #"l & " #"l " #"l " #"l " #"l ' " #"l " #"l " #"l " #"l ( " #"l " #"l " #"l " #"l & " #"l " #"l " #"l " #"l ' " #"l " #"l " #"l " #"l ( " #"l " #"l " #"l " #"l & " #"l #"l " #"l " #"l ' " #"l #"l " #"l " #"l ( " #"l #"l " #"l " #"l " #"l " #"l " #"l " #"l " #"l " #"l " #"l " #"l " #"l " #"l .T #"l " #"l " #"l " #"l " #"l " #"l " #"l " #"l @7T #"l " #"l " #"l " #"l @7T #"l ` T #"l " #"l " #"l @7T #"l ` T #"l " #"l " #"l " #"l " #"l " #"l PAT #"l 0T #"l " #"l " #"l " #"l PAT #"l 0T #"l " #"l " #"l " #"l PAT #"l 0T #"l " #"l " #"l .T #"l PAT #"l 0T #"l " #"l ( " #"l ( " #"l ( " #"l & " #"l & " #"l & " #"l ' " #"l ' " #"l ' " #"l " #"l " #"l " #"l " #"l " #"l " #"l " #"l " #"l " #"l " #"l " #"l " #"l " #"l " #"l " #"l " #"l " #"l " #"l " #"l " #"l " #"l " #"l " #"l " #"l " #"l " #"l " #"l " #"l " #"l " #"l " #"l " #"l " #"l " #"l " #"l " #"l " #"l " #"l " #"l " #"l " #"l " #"l " #"l " #"l " #"l :T #"l p " #"l PAT #"l %T #"l " #"l p " #"l p " #"l PAT #"l %T #"l " #"l p " #"l " #"l " #"l p " #"l " #"l " #"l p " #"l :T #"l :T #"l " #"l " #"l ) " #"l ) BT #"l P%T #"l #"l " #"l " #"l " #"l P%T #"l " #"l & P%T #"l & #"l O " #"l ' P%T #"l ' #"l " #"l ( P%T #"l ( #"l " #"l & " #"l & " #"l & " #"l ' " #"l ' " #"l ' " #"l ) " #"l ) " #"l ) " #"l & ;T #"l O " #"l & " #"l O " #"l ' ;T #"l P " #"l ' " #"l P " #"l ) ;T #"l ) " #"l ) " #"l ) " #"l & " #"l O " #"l & " #"l & #"l O #"l O " #"l ' " #"l P " #"l ' " #"l ' #"l P #"l P " #"l ) " #"l ) " #"l ) " #"l ) #"l ) #"l ) PAT #"l " #"l %T #"l " #"l PAT #"l " #"l %T #"l " #"l PAT #"l " #"l %T #"l " #"l PAT #"l " #"l %T #"l " #"l PAT #"l " #"l %T #"l " #"l " #"l " #"l " #"l " #"l " #"l " #"l " #"l " #"l " #"l 6T #"l 07T #"l " #"l " #"l " #"l " #"l " 9 " #"l " #"l " #"l " 9 " #"l " #"l " #"l p " #"l " #"l " #"l " #"l p " #"l " #"l @7T #"l p " #"l 6T #"l 6T #"l " #"l " #"l " #"l " #"l " 9 " #"l " #"l T #"l " #"l " #"l " #"l T #"l T #"l " #"l :T #"l T #"l T #"l :T #"l T #"l T #"l " #"l " #"l .T #"l " #"l .T #"l " #"l .T #"l #"l "T #"l " #"l " #"l #"l "T #"l " #"l " #"l #"l "T #"l " #"l " #"l p " #"l #"l "T #"l " #"l " #"l p " #"l #"l P/T #"l " #"l " #"l #"l #"l P/T #"l " #"l " #"l #"l #"l " /T #"l $T #"l " #"l " #"l #"l #"l " /T #"l $T #"l " #"l " #"l #"l #"l " /T #"l $T #"l " #"l " #"l #"l #"l " /T #"l $T #"l " #"l " #"l #"l #"l " #"l " #"l .T #"l 0;T #"l #"l #"l #"l #"l @9T #"l #"l " #"l p " #"l @8T #"l #"l " #"l p " #"l #"l #"l #"l @9T #"l #"l p " #"l @8T #"l #"l p " #"l #"l #"l #"l #"l #"l #"l #"l #"l #"l #"l #"l #"l " #"l " #"l " #"l " #"l " #"l " #"l " #"l " #"l " #"l " #"l 0 T #"l #"l #"l " #"l " #"l " #"l 0 T #"l " #"l #"l #"l " #"l " #"l " #"l " #"l @9T #"l 0 T #"l " #"l " #"l " #"l 0 T #"l " #"l =T #"l #"l " #"l 0 T #"l =T #"l #"l " #"l " #"l " #"l `#T #"l " #"l " #"l " #"l `#T #"l " #"l " #"l " #"l `#T #"l " #"l " #"l " #"l `#T #"l " #"l ( " #"l ( " #"l ( " #"l & " #"l & " #"l & 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" #"l " #"l PAT #"l 0T #"l " #"l .T #"l " #"l " #"l PAT #"l " #"l & P/T #"l " #"l & " #"l & " #"l ' P/T #"l " #"l ' " #"l ' " #"l ( P/T #"l " #"l ( " #"l ( BT #"l ' 0T #"l " #"l ' " #"l ' PAT #"l BT #"l BT #"l `#T #"l " #"l " #"l " #"l " #"l p " #"l " #"l " #"l " #"l p " #"l " #"l " #"l " #"l p " #"l " #"l " #"l 4T #"l $T #"l PAT #"l " #"l %T #"l 4T #"l p " #"l PAT #"l %T #"l 4T #"l p " #"l " #"l " #"l " #"l " #"l " #"l " #"l " " #"l " #"l " 9 " #"l " #"l " 9 " #"l " #"l " 9 " #"l & " #"l & " 9 & " #"l " #"l " " #"l " #"l " 9 " #"l " #"l " 9 PAT #"l %T #"l " #"l " 9 PAT #"l %T #"l " #"l " #"l PAT #"l %T #"l " #"l " #"l PAT #"l %T #"l :T #"l p " #"l " #"l " #"l " 9 0$T #"l " #"l " #"l " #"l p$T #"l " #"l " #"l " #"l p$T #"l " #"l " #"l " 9 0$T #"l " #"l " #"l " #"l " #"l >T #"l " #"l p " #"l p " #"l " 9 p " #"l " 9 p " #"l " 9 " 9 p " #"l " 9 " 9 " #"l " #"l p " #"l " #"l " #"l p " #"l " #"l " #"l " #"l " 9 " #"l " #"l " #"l " 9 " #"l " #"l p " #"l " 9 " #"l " #"l p " #"l " 9 " #"l " #"l p " #"l " 9 " #"l " #"l p " #"l " #"l .T #"l " 9 " #"l " #"l p " #"l " #"l .T #"l " 9 #"l @9T #"l #"l " #"l p " #"l #"l @8T #"l #"l " #"l p " #"l #"l @9T #"l #"l p " #"l #"l @8T #"l #"l p " #"l " #"l p " #"l p " #"l " #"l " #"l #"l " #"l " #"l #"l " 9 " p " ' t " a " 9 " p " ' t " #"l ; " #"l ; " #"l < " #"l < " #"l = " #"l = " #"l > " #"l > " #"l N " #"l N " #"l ; " #"l ; " #"l < " #"l < " #"l = " #"l = " #"l > " #"l > " #"l N " #"l N " #"l ; " #"l < " #"l = " #"l > " #"l N " #"l N " #"l N " #"l N " #"l N " #"l N " #"l N " #"l = " #"l N " #"l N " #"l N " #"l & p " #"l " #"l & " #"l N " #"l & " #"l N " #"l & " #"l N p " #"l " #"l N #"l " #"l ; " #"l ; " #"l ; " #"l < " #"l < " #"l < " #"l = " #"l = " #"l = " #"l > " #"l > " #"l > " #"l = " #"l < " #"l < " #"l > " #"l = " #"l = " #"l < " #"l < " #"l T #"l " #"l < " #"l < p " #"l " #"l = " #"l p " #"l " #"l " #"l = " #"l " #"l = " #"l " #"l = p " #"l " #"l = #"l " #"l < " #"l p " #"l " #"l " #"l < p " #"l " #"l < #"l " #"l ; " #"l p " #"l " #"l " #"l ; p " #"l " #"l ; #"l " #"l ; " #"l ; " #"l ; " #"l D " #"l D " #"l E " #"l E " #"l F " #"l F " #"l G " #"l G " #"l Q " #"l Q " #"l R " #"l R " #"l ? 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Y z Y i Y Y Y Y p Y J Y U Y Y U Y Y Y Y U Y Y Y Y Y Y Y p Y c Y Y Y Y Y Y Y Y Y Y 5 Y p Y Y Y Y Y P Y 5 Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y o Y @ Y Y @ Y Y Y Y @ Y Y Y Y Y Y ` Y % Y Y Y Y Y Y Y Y Y Y Y 3 Y Y 3 Y V Y Y Y Y Y Y t Y Y t Y t Y t Y Y t Y t Y t Y t Y t Y Y Y p Y t Y t Y t Y t Y t Y t Y t Y t Y t Y U Y Y Y Y Y t Y ` Y p Y t Y t Y t Y t Y t Y t Y t Y t Y t Y t Y t Y t Y t Y t Y t Y t Y t Y t Y t Y t Y t Y t Y t Y t Y t Y t Y t Y t Y t Y t Y t Y t Y t Y t Y t Y t Y t Y t Y t Y t Y t Y t Y t Y t Y t Y t Y t Y t Y Y d Y Y @ Y Y yY yY Y yY Y BrZ rZ rZ rZ rZ rZ rZ 'sZ sZ rZ rZ sZ 2tZ PtZ rZ 4rZ 8wZ rZ rZ rZ wZ rZ rZ vZ vZ rZ rZ rZ rZ rZ vZ vZ PvZ rZ vZ rZ rZ rZ uZ rZ rZ rZ rZ rZ rZ rZ uZ PrZ PrZ uZ puZ @uZ tZ gtZ PrZ PrZ wZ PrZ PrZ PrZ PrZ PrZ PrZ PrZ PrZ PrZ PrZ PrZ wZ 2yZ xZ 7zZ PrZ PrZ PrZ PrZ PrZ PrZ PrZ PrZ PrZ PrZ PrZ PrZ PrZ PrZ PrZ PrZ PrZ PrZ PrZ PrZ UxZ zZ yZ hwZ ? Z Z Z Z Z Z Z Z Z Z Z Z Z Z Z Z Z Z Z Z Z Z Z Z Z Z Z Z Z Z Z Z = Z Z Z Z Z ' Z Z Z Z Z Z Z Z Z Z Z Z Z Z Z Z Z Z Z Z Z Z Z Z Z Z Z Z Z Z Z Z Z Z Z Z Z Z Z Z Z Z Z Z Z Z Z Z Z Z Z Z Z Z Z Z Z Z Z b Z s Z L Z L Z L Z L Z L Z L Z L Z L Z L Z L Z L Z L Z L Z L Z L Z L Z L Z L Z L Z L Z L Z L Z L Z L Z L Z L Z L Z L Z L Z L Z L Z L Z L Z L Z L Z Z L Z L Z L Z { Z Z Z ] Z Z Z Z Z Z Z Z Z Z Z Z Z Z Z Z Z Z Z Z Z Z W Z UNSPEC_GOT UNSPEC_GOTOFF UNSPEC_GOTPCREL UNSPEC_GOTTPOFF UNSPEC_TPOFF UNSPEC_NTPOFF UNSPEC_DTPOFF UNSPEC_GOTNTPOFF UNSPEC_INDNTPOFF UNSPEC_PLTOFF UNSPEC_MACHOPIC_OFFSET UNSPEC_PCREL UNSPEC_STACK_ALLOC UNSPEC_SET_GOT UNSPEC_REG_SAVE UNSPEC_DEF_CFA UNSPEC_SET_RIP UNSPEC_SET_GOT_OFFSET UNSPEC_MEMORY_BLOCKAGE UNSPEC_STACK_CHECK UNSPEC_TP UNSPEC_TLS_GD UNSPEC_TLS_LD_BASE UNSPEC_TLSDESC UNSPEC_TLS_IE_SUN UNSPEC_SCAS UNSPEC_FNSTSW UNSPEC_SAHF UNSPEC_PARITY UNSPEC_FSTCW UNSPEC_ADD_CARRY UNSPEC_FLDCW UNSPEC_REP UNSPEC_LD_MPIC UNSPEC_TRUNC_NOOP UNSPEC_DIV_ALREADY_SPLIT UNSPEC_CALL_NEEDS_VZEROUPPER UNSPEC_FIX_NOTRUNC UNSPEC_MASKMOV UNSPEC_MOVMSK UNSPEC_MOVNT UNSPEC_MOVU UNSPEC_RCP UNSPEC_RSQRT UNSPEC_SFENCE UNSPEC_PFRCP UNSPEC_PFRCPIT1 UNSPEC_PFRCPIT2 UNSPEC_PFRSQRT UNSPEC_PFRSQIT1 UNSPEC_MFENCE UNSPEC_LFENCE UNSPEC_PSADBW UNSPEC_LDDQU UNSPEC_MS_TO_SYSV_CALL UNSPEC_COPYSIGN UNSPEC_IEEE_MIN UNSPEC_IEEE_MAX UNSPEC_SIN UNSPEC_COS UNSPEC_FPATAN UNSPEC_FYL2X UNSPEC_FYL2XP1 UNSPEC_FRNDINT UNSPEC_FIST UNSPEC_F2XM1 UNSPEC_TAN UNSPEC_FXAM UNSPEC_FRNDINT_FLOOR UNSPEC_FRNDINT_CEIL UNSPEC_FRNDINT_TRUNC UNSPEC_FRNDINT_MASK_PM UNSPEC_FIST_FLOOR UNSPEC_FIST_CEIL UNSPEC_SINCOS_COS UNSPEC_SINCOS_SIN UNSPEC_XTRACT_FRACT UNSPEC_XTRACT_EXP UNSPEC_FSCALE_FRACT UNSPEC_FSCALE_EXP UNSPEC_FPREM_F UNSPEC_FPREM_U UNSPEC_FPREM1_F UNSPEC_FPREM1_U UNSPEC_C2_FLAG UNSPEC_FXAM_MEM UNSPEC_SP_SET UNSPEC_SP_TEST UNSPEC_SP_TLS_SET UNSPEC_SP_TLS_TEST UNSPEC_PSHUFB UNSPEC_PSIGN UNSPEC_PALIGNR UNSPEC_EXTRQI UNSPEC_EXTRQ UNSPEC_INSERTQI UNSPEC_INSERTQ UNSPEC_BLENDV UNSPEC_INSERTPS UNSPEC_DP UNSPEC_MOVNTDQA UNSPEC_MPSADBW UNSPEC_PHMINPOSUW UNSPEC_PTEST UNSPEC_ROUND UNSPEC_CRC32 UNSPEC_PCMPESTR UNSPEC_PCMPISTR UNSPEC_FMADDSUB UNSPEC_XOP_UNSIGNED_CMP UNSPEC_XOP_TRUEFALSE UNSPEC_XOP_PERMUTE UNSPEC_FRCZ UNSPEC_AESENC UNSPEC_AESENCLAST UNSPEC_AESDEC UNSPEC_AESDECLAST UNSPEC_AESIMC UNSPEC_AESKEYGENASSIST UNSPEC_PCLMUL UNSPEC_PCMP UNSPEC_VPERMIL UNSPEC_VPERMIL2 UNSPEC_VPERMIL2F128 UNSPEC_MASKLOAD UNSPEC_MASKSTORE UNSPEC_CAST UNSPEC_VTESTP UNSPEC_VCVTPH2PS UNSPEC_VCVTPS2PH UNSPEC_BEXTR UNSPEC_RDRAND UNSPECV_BLOCKAGE UNSPECV_STACK_PROBE UNSPECV_PROBE_STACK_RANGE UNSPECV_EMMS UNSPECV_LDMXCSR UNSPECV_STMXCSR UNSPECV_FEMMS UNSPECV_CLFLUSH UNSPECV_ALIGN UNSPECV_MONITOR UNSPECV_MWAIT UNSPECV_CMPXCHG UNSPECV_XCHG UNSPECV_LOCK UNSPECV_PROLOGUE_USE UNSPECV_CLD UNSPECV_NOPS UNSPECV_VZEROALL UNSPECV_VZEROUPPER UNSPECV_RDTSC UNSPECV_RDTSCP UNSPECV_RDPMC UNSPECV_LLWP_INTRINSIC UNSPECV_SLWP_INTRINSIC UNSPECV_LWPVAL_INTRINSIC UNSPECV_LWPINS_INTRINSIC UNSPECV_RDFSBASE UNSPECV_RDGSBASE UNSPECV_WRFSBASE UNSPECV_WRGSBASE UNSPECV_SPLIT_STACK_RETURN $ 2 I V i x 2 > L X f s # 0 < G T b o  , 7 B P ] l { # 5 G [ m 2 @ M \ j w & 6 F ^ s 0 D T e q  ( 6 F T d r 0 G ` y /i/toolchain-src//gcc/gcc-4.6/gcc/bb-reorder.c Duplicated bb %d (created bb %d) Growing the dynamic array to %d elements. Block %d can't be copied because its size = %d. Possible start point of next round: %d (key: %d) Basic block %d was visited in trace %d Changing key for bb %d from %ld to %ld. Possible start of %s round: %d (key: %ld) multiple hot/cold transitions found (bb %i) STC - round %d Getting bb %d Rotating loop %d - %d Selecting BB %d Trace %d (round %d): %d [%d] %d [%d] Connection: %d %d Connection: %d %d Final order: compgotos bbro bbpart add_labels_and_missing_jumps reorder_basic_blocks 2 d find_traces_1_round copy_bb connect_traces verify_hot_cold_block_grouping BB%d live: Now live btrs are it's not migratable trying block %d ... Now btrs live in range are: failed to move :not const : unambiguous use of reg %d btl1 btl2 /i/toolchain-src//gcc/gcc-4.6/gcc/bt-load.c Adding end of block %d and rest of %d to live range Adding block %d to live range Attempting to migrate pt from insn %d (cost = %d, min_cost = %d) ... it's already combined with another pt migrating to basic block %d, using reg %d Combining def in insn %d with def in insn %d New pt is insn %d, inserted after insn %d giving up because there are no free target registers Basic block %d: count = %lld loop-depth = %d idom = %d Found target reg definition: sets %u { bb %d, insn %d }%s priority %d Uses target reg: { bb %d, insn %d } Def in insn %d reaches use in insn %d (use %d has multiple reaching defs) Putting insn %d back on queue with priority %d branch target register load optimization is not intended to be run twice insn_sets_btr_p augment_live_range move_btr_def /i/toolchain-src//gcc/gcc-4.6/gcc/cfg.c Invalid sum of outgoing probabilities %.1f%% Invalid sum of outgoing counts %i, should be %i Invalid sum of incoming frequencies %i, should be %i Invalid sum of incoming counts %i, should be %i Register %d used %d times across %d insns ; crosses call with %d frequency bb %i count became negative after threading Jump threading proved probability of edge %i->%i too small (it is %i, should be %i). Edge frequencies of bb %i has been reset, frequency of block should end up being 0, it is %i edge %i->%i count became negative after threading original_copy ENTRY EXIT [%.1f%%] Basic block %d Successors: %d registers. in block %d ; set %d time%s ; user var ; dies in %d places ; crosses 1 call ; crosses %d calls ; %d bytes ; pref %s ; %s or none ; pref %s, else %s ; pointer %sBasic block %d , prev %d , next %d , loop_depth %d, count , freq %i , maybe hot , probably never executed %sPredecessors: %sSuccessors: %d basic blocks, %d edges. irreducible_loop superblock nosched xlabel fwdr nothrd abcall fake dfs_back can_fallthru irreducible loop_exit true false get_loop_copy get_bb_copy get_bb_original free_original_copy_tables initialize_original_copy_tables scale_bbs_frequencies_gcov_type update_bb_profile_for_threading n t p m e m uq free_aux_for_edges alloc_aux_for_edges alloc_aux_for_edge free_aux_for_blocks alloc_aux_for_blocks alloc_aux_for_block Ibr dq p disconnect_src compact_blocks clear_edges G G 7%s { %d->%d %-4d - edge( entry, exit) Compressed edge list, %d BBs + entry & exit, and %d edges *p* No index for edge from %d to %d *p* Pred for index %d should be %d not %d *p* Succ for index %d should be %d not %d *** Edge (%d, %d) appears to not have an index *** Edge (%d, %d) has index %d, but there is no edge /i/toolchain-src//gcc/gcc-4.6/gcc/cfganal.c compute_idf dfs_enumerate_from pre_and_rev_post_order_compute inverted_post_order_compute /i/toolchain-src//gcc/gcc-4.6/gcc/cfgbuild.c [ [ [ [ [ [ [ p [ [ [ x [ p [ p [ p [ mark_tablejump_edge make_edges make_label_edge rtl_make_eh_edge control_flow_insn_p inside_basic_block_p Dead jumptable %i removed Infinite loop in BB %i. Conditionals threaded. Deleted label in block %i. Deleting fallthru block %i. /i/toolchain-src//gcc/gcc-4.6/gcc/cfgcleanup.c Forwarding edge %i->%i to %i failed. Outcomes of branch in bb %i and %i differ too much (%i %i) Conditionals in bb %i and %i match. Tablejumps in bb %i and %i match. Splitting bb %i before %i insns Cross jumping from bb %i to bb %i; %i common insns try_optimize_cfg iteration %i Merged %d and %d without moving. Moved block %d after %d and merged. Moved block %d before %d and merged. Simplifying condjump %i around jump %i try_optimize_cfg merge_blocks_move_predecessor_nojumps try_forward_edges delete_unreachable_blocks \ \ \ \ \ \ \ \ \ } \ \ \ \ \ \ \ \ \ \ \ \ * \ \ \ \ \ \ \ \ \ -\ 9-\ -\ 9-\ 9-\ 9-\ 9-\ 9-\ 9-\ 9-\ 9-\ 9-\ -\ u-\ -\ z/\ z/\ /\ /\ .0\ .\ .\ .\ .\ .\ }0\ }0\ E8\ E8\ /8\ /8\ 8\ 8\ 8\ 8\ K\ EN\ M\ \L\ \L\ ML\ M\ K\ K\ L\ L\ K\ K\ L\ \L\ L\ K\ K\ K\ K\ K\ K\ K\ K\ K\ L\ K\ P\ XP\ K\ P\ i\ i\ i\ i\ i\ i\ i\ i\ i\ i\ i\ i\ i\ i\ i\ i\ i\ i\ i\ i\ i\ i\ k\ i\ k\ m\ m\ Lk\ i\ i\ i\ i\ i\ i\ i\ i\ n\ o\ o\ )l\ l\ #n\ n\ o\ #n\ i\ i\ i\ i\ i\ i\ i\ i\ i\ i\ o\ i\ i\ i\ i\ i\ i\ i\ i\ i\ i\ i\ i\ i\ i\ i\ i\ i\ m\ m\ j\ i\ i\ i\ i\ i\ i\ i\ i\ i\ i\ i\ i\ i\ i\ i\ i\ i\ i\ m\ m\ \ ~\ ~\ ~\ ~\ ~\ ~\ ~\ ~\ ~\ ~\ ~\ ~\ \ ~\ ~\ ~\ ~\ ~\ ~\ ~\ ~\ [\ [\ ~\ ~\ g\ ~\ [\ [\ \ \ \ \ D \ \ \ \ \ \ \ \ \ . \ \ \ \ \ \ \ \ \ / \ / \ / \ 5 \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ j \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ G \ G \ G \ G \ G \ G \ G \ G \ G \ G \ G \ G \ G \ G \ G \ \ G \ G \ G \ \ G \ G \ G \ G \ G \ + \ + \ G \ G \ G \ G \ G \ G \ G \ G \ G \ G \ \ \ \ \ \ \ \ T \ T \ T \ T \ T \ n \ n \ 4 \ K \ K \ K \ K \ K \ K \ K \ K \ K \ \ \ K \ K \ K \ K \ K \ K \ K \ K \ K \ K \ \ K \ K \ K \ M \ K \ z \ _ \ \ \ e \ ( \ \ Y \ \ \ D \ d \ d \ d \ d \ d \ d \ d \ d \ d \ \ \ 9 \ d \ d \ d \ d \ d \ d \ d \ d \ d \ \ \ \ \ ( \ \ 7 \ \ < \ d \ d \ d \ d \ d \ d \ d \ d \ d \ d \ d \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ A \ \ d \ d \ d \ d \ d \ d \ d \ d \ d \ d \ d \ \ d \ d \ d \ d \ d \ d \ d \ # \ \ \ \ \ \ O \ / \ / \ / \ / \ / \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ R \ \ \ \ 6 \ \ \ \ ( \ \ r \ \ B \ \ \ \ \ \ \ \ & \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ U \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ > ] > ] ] ] ] ] ] ] p \ p \ Y\ ]\ Y\ create_log_links try_combine subst make_extraction simplify_logical try_widen_shift_mode do_SUBST recog_for_combine undo_all distribute_notes ;; Combiner totals: %d attempts, %d substitutions (%d requiring new space), ;; %d successes. ;; Combiner statistics: %d attempts, %d substitutions (%d requiring new space), ;; %d successes. /i/toolchain-src//gcc/gcc-4.6/gcc/combine.c Failed to match this instruction: Successfully matched this instruction: rejecting combination of insns %d, %d, %d and %d original costs %d + %d + %d + %d = %d rejecting combination of insns %d, %d and %d original costs %d + %d + %d = %d rejecting combination of insns %d and %d replacement costs %d + %d = %d Trying %d, %d, %d -> %d: Trying %d, %d -> %d: Trying %d -> %d: original costs %d + %d = %d replacement cost %d modifying other_insn modifying insn i1 modifying insn i2 modifying insn i3 insn_cost %d: %d deleting noop move %d csa cmpelim /i/toolchain-src//gcc/gcc-4.6/gcc/cse.c Deleted %i trivially dead insns ;; Following path with %d sets: ] ] ] ] ] , ] , ] , ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] m ] m ] m ] m ] m ] m ] m ] m ] m ] m ] m ] m ] m ] m ] m ] m ] m ] m ] m ] m ] m ] m ] m ] m ] m ] 4 ] 4 ] 4 ] 4 ] m ] 4 ] 4 ] I ] m ] ] m ] m ] m ] ] 4 ] 4 ] 4 ] m ] m ] m ] m ] m ] m ] m ] m ] m ] m ] m ] m ] m ] m ] m ] m ] m ] m ] m ] m ] m ] m ] m ] m ] m ] m ] m ] m ] m ] m ] m ] m ] m ] m ] m ] m ] m ] m ] m ] m ] m ] m ] m ] m ] m ] m ] m ] m ] m ] m ] m ] ] ] m ] m ] m ] m ] m ] m ] m ] m ] m ] m ] m ] m ] m ] m ] m ] m ] m ] m ] m ] m ] m ] m ] 4 ] 3 ] ] ] ] ] ] ] ] ] ] ] ] ] u ] u ] u ] ] ] ] u ] f ] ] ] ] ] ] ] ] ] u ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] % ] ] b ] ] ] ] ] ] ] b ] ] ] ] ] ] ] ] ] ] b ] h ] ] G ] ] ] ] p ] 4 ] ] b ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] b ] b ] b ] b ] b ] b ] O ] z ] z ] z ] z ] z ] z ] z ] z ] z ] z ] z ] d ] z ] z ] z ] z ] z ] z ] z ] z ] z ] z ] z ] z ] z ] z ] z ] z ] z ] z ] z ] z ] z ] ] z ] P ] z ] z ] z ] ] ] n ] n ] n ] n ] n ] n ] n ] n ] n ] n ] n ] n ] n ] ] n ] n ] n ] n ] n ] n ] n ] n ] > ] n ] n ] n ] ] ] ] ] n ] ] ] ] n ] ) ] n ] n ] n ] ) ] ] ] ] ] ] ] h ] Z ] Z ] Z ] ] Z ] ] ] cse_condition_code_reg cse_cc_succs cse_change_cc_mode_insn count_reg_usage % % % % % cse_extended_basic_block invalidate validate_canon_reg insert_with_costs insert_regs make_regs_eqv make_new_qty record_jump_equiv cse_find_path exp_equiv_p hash_rtx_cb Equivalence chain for cse1 cse_local DCE: Deleting insn %d Adding insn %d to worklist Finding needed instructions: Processing use of in insn %d: processing block %d lr out = ud_dce rtl_dce /i/toolchain-src//gcc/gcc-4.6/gcc/dce.c Finished finding needed instructions: processing block %d live out = finished processing insn %d live out = find_call_stack_args marked_insn_p 9.999999E96 9.999999999999999E384 /i/toolchain-src//gcc/gcc-4.6/gcc/dfp.c 9.999999999999999999999999999999999E6144 N^ 4N^ =N^ M^ M^ M^ M^ M^ M^ M^ M^ M^ N^ M^ O^ M^ O^ IO^ O^ M^ decimal_real_maxval decimal_real_arithmetic decimal_to_decnumber decimal_real_to_decimal decimal_round_for_format has store %s insn=%d %s clear_alias_mode_pool in: in: *MISSING* gen: gen: *MISSING* kill: kill: *MISSING* out: out: *MISSING* Locally deleting insn %d found alias set %d mem: after canon_rtx address: gid=%d offset=%d cse_store_info_pool **scanning insn=%d %s call %d removing from active processing spill load %d processing cselib load mem: rtx_store_info_pool read_info_pool insn_info_pool bb_info_pool rtx_group_info_pool deferred_change_pool group %d is frame related group %d(%d+%d): doing global processing starting to process insn %d v: i = %d, index = %d failing at i = %d regular read non-frame wild read Spill deleting insn %d /i/toolchain-src//gcc/gcc-4.6/gcc/dse.c trying to replace %smode load in insn %d from %smode store in insn %d -- could not extract bits of stored value abandoning replacement because sequence clobbers live hardregs: -- replaced the loaded MEM with -- replacing the loaded MEM with led to an invalid instruction *** Global dataflow info after analysis. disqualifying alias set %d, (%s) != (%s) after cselib_expand address: no cselib val - should be a wild read. varying cselib base=%u:%u offset = %d adding wild read for (clobber (mem:BLK (scratch)) processing spill store %d(%s) processing const base store gid=%d[%d..%d) processing cselib store [%d..%d) trying spill store in insn=%d alias_set=%d trying store in insn=%d gid=%d[%d..%d) handling memset as BLKmode store mems_found = %d, cannot_delete = %s Locally deleting insn %d because insn %d stores the same value and couldn't be eliminated adding wild read, volatile or barrier. adding wild read, canon_address failure. processing const load gid=%d[BLK] processing const load gid=%d[%d..%d) processing cselib load against insn %d clear alias sets disqualified clear alias sets doing global spill processing dse: local deletions = %d, global deletions = %d, spill deletions = %d record_store clear_alias_set_lookup get_stored_val dse_record_singleton_alias_set /i/toolchain-src//gcc/gcc-4.6/gcc/fwprop.c Number of successful forward propagations: %d Changes to insn %d not recognized Changes to insn %d not profitable ^ ^ ^ ^ : ^ ^ p ^ p ^ ^ p ^ ^ ^ all_uses_available_at forward_propagate_asm propagate_rtx In insn %d, replacing with Changed insn %d Setting REG_EQUAL note fwprop1 fwprop2 ^ ^ ^ ^ ^ ^ ^ ^ ^ * ^ # ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ L ^ E ^ ^ > ^ 7 ^ ^ i ^ k ^ ^ ^ ^ ^ A ^ : ^ ^ 3 ^ , ^ C ^ ^ ^ Y ^ R ^ J ^ _ S _ _ _ _ _ _ _ _ _ _ _ _ { _ fold_stmt_inplace fold_stmt_1 fold_gimple_assign gimple_adjust_this_by_delta gimple_fold_builtin gimplify_and_update_call_from_tree may_propagate_address_into_dereference /i/toolchain-src//gcc/gcc-4.6/gcc/gimple-fold.c /i/toolchain-src//gcc/gcc-4.6/gcc/gimple-low.c ,_ ]-_ ,_ ]-_ ,_ ]-_ ,_ ,_ -_ -_ o-_ ,_ ,_ ,_ ,_ ,_ ,_ ._ ,_ ,_ ,_ ,_ ,_ ,_ ,_ ,_ }._ }._ ,_ ,_ ,_ ,_ ,_ ,_ 2_ 2_ 2_ 2_ 2_ 2_ 2_ 2_ 3_ 2_ 2_ 2_ 2_ 2_ 2_ 2_ 2_ +3_ [4_ D4_ D4_ 5_ D4_ 5_ f4_ D4_ 4_ D4_ D4_ D4_ D4_ D4_ D4_ D4_ D4_ D4_ D4_ D4_ D4_ D4_ D4_ D4_ D4_ D4_ D4_ D4_ D4_ D4_ D4_ D4_ D4_ D4_ D4_ D4_ D4_ D4_ D4_ D4_ D4_ D4_ D4_ D4_ D4_ D4_ D4_ D4_ D4_ D4_ D4_ D4_ D4_ D4_ D4_ D4_ D4_ D4_ D4_ D4_ D4_ D4_ D4_ D4_ D4_ D4_ D4_ D4_ D4_ D4_ D4_ D4_ D4_ D4_ D4_ D4_ D4_ 4_ 4_ D4_ D4_ 4_ 4_ D4_ D4_ ;5_ lower_function_body lower_gimple_bind lower_stmt setjmpvar graph: { port_sharing: no color: blue class: %d color: green " lightgrey darkgreen darkgrey shape: ellipse white " } /i/toolchain-src//gcc/gcc-4.6/gcc/graph.c edge: { sourcename: "%s.%d" targetname: "%s.%d" %s graph: { title: "%s" folding: 1 hidden: 2 node: { title: "%s.0" } graph: { title: "%s.BB%d" folding: 1 color: lightblue label: "basic block %d edge: { sourcename: "%s.0" targetname: "%s.%d" } node: { title: "%s.%d" color: %s label: "%s %d node: { title: "%s.999999" label: "END" } } #"l D r finish_graph_dump_file clean_graph_dump_file Graphite loop optimizations cannot be used /i/toolchain-src//gcc/gcc-4.6/gcc/haifa-sched.c ;; ====================================================== ;; =====================ADVANCING TO===================== ;; -- basic block %d from %d to %d -- %s reload ;; Procedure %cr-begin-data-spec motions == %d ;; Procedure %cr-be-in-data-spec motions == %d ;; Procedure %cr-begin-control-spec motions == %d ;; Procedure %cr-be-in-control-spec motions == %d ;; Fixed fallthru to EXIT : %d->>%d->%d->>EXIT ;; Generated recovery block rec%d removed from ready or queue lists ;; dependencies resolved: insn %s ;; Generated check insn : %s ;; Generated twin insn : %d/rec%d ;; Removed simple check : %s ;; Chosen insn (but can't issue) : %s ;; Ready list on entry: %d insns ;; before reload => truncated to %d insns moving to ready without stalls moving to ready with %d stalls ;; Ready list after queue_to_ready: ;; Ready list after ready_sort: ;; new head = %d ;; new tail = %d %s:%d (cost=%d :delay=%d ;; %s: reorder %i ;; Ready-->Q: insn %s: queued for %d cycles. ;; tick updated: insn %s into ready into queue with cost=%d ; data-spec; ; control-spec; ; in-control-spec; ;; %3i--> %-40s: %s%+d(%d) ;; resetting: debug insn %d ;; Chosen insn : %s ;; look at index %d + %d transition cost = %d ;; Early Q-->Ready: insn %s ;; Advanced a state. ;; Q-->Ready: insn %s: requeued because ready full ;; Ready list (t = %3d): ;; %s:%d(%d) ;; Second chance ;; Ready list (final): ;; total time = %d K_ haifa_luid_for_non_insn haifa_init_insn sched_split_block_1 s_ t_ N_ H_ bb_note unlink_bb_notes sched_speculate_insn sched_change_pattern sched_create_recovery_block find_fallthru_edge_from xrecalloc sched_extend_ready_list try_ready haifa_speculate_insn change_queue_index ready_remove_insn ready_remove ready_remove_first queue_remove ready_add queue_insn fix_tick_ready haifa_init_only_bb set_priorities priority dep_list_size schedule_block restore_bb_notes print_curr_reg_pressure create_check_block_twin process_insn_forw_deps_be_in_spec clear_priorities add_to_speculative_block move_insn fix_jump_move move_block_after_check move_succs schedule_insn fix_recovery_deps add_jump_dependencies fix_inter_tick max_issue remove_notes sched_setup_bb_reg_pressure_info setup_insn_reg_pressure_info rank_for_schedule ready_element ready_lastpos /i/toolchain-src//gcc/gcc-4.6/gcc/ifcvt.c %d insn%s converted to conditional execution. ========== Pass %d ========== IF-THEN%s-JOIN block found, pass %d, test %d, then %d IF-THEN%s block found, pass %d, start block %d [insn %d], then %d [%d] , %d %s block%s last test %d [%d] TRAP-IF block found, start %d, trap %d IF-CASE-1 found, start %d, then %d IF-CASE-2 found, start %d, else %d Conversion succeeded on pass %d. %d possible IF blocks searched. was s were -ELSE , else %d , join %d , else %d [%d] , join %d [%d] ========== no more changes %d IF blocks converted. %d true changes made. ce1 ce2 ce3 ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` &` ` ` ` ` ` ` ` ` ` '` ` ` ` &` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` &` &` &` &` '` &` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` '` noce_try_cmove_arith noce_emit_move_insn cond_move_process_if_block cond_move_convert_if_block cond_exec_find_if_block cond_exec_process_insns merge_if_block /i/toolchain-src//gcc/gcc-4.6/gcc/implicit-zee.c Cannot eliminate zero-extension: No defs. Could be extending parameters. Trying to eliminate zero extension : All definitions have been merged previously. Merged Instruction with ZERO_EXTEND: Cond_Move Instruction's mode extended : All merges were successful .... Eliminated the zero extension... %s : num_zee_opportunities = %lld num_realized = %lld Ummergable definitions : get_defs combine_reaching_defs make_defs_and_copies_lists get_insn_status merge_def_and_ze get_reg_di transform_ifelse set_insn_status adding initialization in %s of reg %d at in block %d for insn %d. init-regs /i/toolchain-src//gcc/gcc-4.6/gcc/lower-subreg.c ; Replacing insn: %d with insns: ; Splitting reg %u -> subreg1 subreg2 decompose_multiword_subregs resolve_clobber simplify_gen_subreg_concatn simplify_subreg_concatn resolve_simple_move resolve_subreg_use find_decomposable_subregs /i/toolchain-src//gcc/gcc-4.6/gcc/mcf.c Dump fixup graph for %s(): %s. There are %d vertices and %d edges. new_exit_index is %d. vertex_list[%d]: %d succ fixup edges. Check %s() CFG flow conservation: ******** BB%d(%lld) **INVALID**: Exiting profile correction early to avoid excessive compile time Negative cycle length is %d: After find_minimum_cost_flow() ENTRY'' EXIT'' NEW_EXIT NEW_ENTRY NULL fixup graph edge. flow/capacity=%lld/ +oo, rflow=+oo. rflow=%lld, cost=%lld. (%d->%d) @VERTEX_SPLIT_EDGE @REDIRECT_EDGE @SOURCE_CONNECT_EDGE @SINK_CONNECT_EDGE @SINK_SOURCE_EDGE @REVERSE_EDGE @BALANCE_EDGE @NORMALIZED_EDGE @INVALID_EDGE (f) (b) adjust_cfg_counts(): BB%d: %lld + %lld( - %lld( = %lld %d->%d: %lld (self edge) = %lld (%.1f%%) BB%d(%lld) **INVALID**: in_edges=%lld out_edges=%lld Vertex transformation: Reverse edges: s'->S, T->t': D(v) balance: Adjust supply and demand: supply_value=%lld demand_value=%lld Normalize edges: Anti-parallel edge: New vertex is %d. After normalization: After create_fixup_graph() compute_residual_flow(): Dump augmenting path: ENTRY (path_capacity=%lld) Network flow is %lld. After find_max_flow() : (%lld, %lld) Augment cycle with %lld |` }` ~` ,~` Q~` v~` ~` ~` }` }` create_fixup_graph mcf_sqrt mcf_ln find_fixup_edge dump_fixup_graph find_max_flow find_augmenting_path dequeue enqueue adjust_cfg_counts @ HB/i/toolchain-src//gcc/gcc-4.6/gcc/mode-switching.c mode_sw optimize_mode_switching Both crit_pred and crit_succ are NULL /i/toolchain-src//gcc/gcc-4.6/gcc/modulo-sched.c crr_insn->node=%d, crr_insn->cycle=%d, min_cycle=%d Scheduling %d (%d) in psp_not_empty, checking p %d (%d): pred st = %d; early_start = %d; latency: %d Scheduling %d (%d) in a window (%d..%d) with step %d Scheduling %d (%d) in pss_not_empty, checking s %d (%d): succ st = %d; late_start = %d; latency = %d Scheduling %d (%d) in psp_pss_not_empty, checking p %d (%d): pred st = %d; early_start = %d; latency = %d Scheduling %d (%d) in psp_pss_not_empty, checking s %d (%d): Empty window: start=%d, end=%d, step=%d Trying to schedule node %d INSN = %d in (%d .. %d) step %d SMS loop num: %d, file: %s, line: %d SMS loop inner or !loop_outer SMS not loop_single_full_bb_p SMS doloop_register_get failed node %d, ASAP: %d, ALAP: %d, HEIGHT: %d SMS iis %d %d %d (rec_mii, mii, maxii) SMS sched-failed (stage-count=%d, loop-count= SMS succeeded %d %d (with ii, sc) SMS Branch (%d) will later be scheduled at cycle %d. [ROW %d ]: Starting with ii=%d Processing edge: the node is not scheduled Processing edge: end = %d must_precede: must_follow: Scheduled w/o split in %d split_row=%d min_cycle=%d, max_cycle=%d num_splits=%d SMS analysis phase SMS reached max limit... SMS loop many exits %s %d (file, line) SMS loop many BBs. SMS single-bb-loop SMS loop-count SMS trip-count SMS profile-sum-max SMS loop-with-call SMS loop-with-barrier SMS loop-with-not-single-set SMS loop with subreg in lhs SMS create_ddg failed ...OK SMS transformation phase ========================= SMS doloop SMS built-ddg %d SMS num-loads %d SMS num-stores %d SMS const-doloop Order params SMS final nodes order: SMS failed... , trip-count= Node = %d; INSN = %d asap = %d: time = %d: nreg_moves = %d: reg_move = sms sms_schedule check_nodes_order sms_schedule_by_order calculate_must_precede_follow verify_partial_schedule ps_insert_empty_row normalize_sched_times generate_prolog_epilog /i/toolchain-src//gcc/gcc-4.6/gcc/mversn-dispatch.c Creating constructor/global for function %s Name of new constructor function = %s Not cloning, noclone attribute set Not cloning, target attribute set Function size exceeds auto cloning threshold. Function with version_selector attribute found : %s. Making constructor for it. Converting __builtin_dispatch stmt in:%s Before Converting __builtin_dispatch : Converted __builtin_dispatch : Not hoisting builtin_dispatch as feature_test function not version_selector : %s calls __builtin_dispatch atleast once. %s is a hot function, consider cloning ... %s has a depth = %d callgraph path to %s Not propogating __builtin_dispatch... maximum cloning depth = %d reached Reached cloning limit specified by "num-mversn-clones" for %s %s has %d predicates, Not cloning for > 1 %s.%s version.selector.constructor version.selector.global Creating global variable %s ifunc.selector autoclone.%d autoclone.original version_selector %s will be cloned clone.0 clone.1 Specialize stmt : Specialized stmt : multiversion_dispatch convert_builtin_dispatch auto_clone do_auto_clone clone_function purge_function_body dispatch_using_ifunc make_selector_function mark_function_not_cloneable do_convert_builtin_dispatch handle_version_selector_attr_function allocate_new_var make_constructor_function convert_builtin_dispatch find_version_selector_func_addr builtin_dispatch_ipa_clone is_builtin_dispatch_stmt_present mark_reachable_functions decide_cloning_phase empty_function_body is_builtin_with_predicate_version_selector make_specialized_call_to_clone variables = protected ( %d * %s <= - %s Deleting %d: Deleting %d (last:%d): #%d := Done with EQ Done with GEQ Converting Eq to Geqs a free elimination of %s after free eliminations: retracting substituting using %s := --- equations have no solution Hash code = %d, eqn = constraint key = %d Removing Redundant Equation: [a] Made Redundant by: [b] Made Redundant by: [c] Made Redundant by: [d] Made Redundant by: cleaned-out wildcard: brought back: unprotecting %s After chain reactions eliminating variable %s in eliminate Redundant: found redundant inequality => => not => inverse problem reduced: omega_solve_geq (%d,%d): upper bound = %d lower bound = %d after normalization: (a lucky exact elimination) (an exact elimination) Max # of splinters = %d Swapping %d and %d Swapping complete No swap needed :::=> %s >= %d :::=> [%s >= %d] :::=> %s <= %d :::=> [%s <= %d] ::=> [%s >= %d] ::=> %s >= %d ::=> [%s <= %d] ::=> %s <= %d an inplace elimination lower bound count = %d Le = %d, Ue = %d, gen = %d Killed %d omega_solve_eq (%d, %d) Promotion possible Ha! We own it! So what? promoting %s to safety handling red equality ---- non-exact elimination: doing moding should not have happened (Entering approximate mode Leaving approximate mode) Using parallel splintering Splinter # %i verifying problem (color mode) verified problem disproved problem in eliminate RED: j = %s, alpha = %d %s: %d, %d fast checks worked it is redundant it is not redundant Checking for red equations: Gist is FALSE a free red elimination of %s ,%s /i/toolchain-src//gcc/gcc-4.6/gcc/omega.c Coalesced pb->geqs into %d EQ's: adding equality constraint %d to outer problem Mod-ing and normalizing produces: Found a single wild card equality: problem reduced, bringing variables back to life variables brought back to life Doing chain reaction unprotection performing non-exact elimination, c = %d alpha1, alpha2, alpha3 = %d,%d,%d found implied over tight inequality found implied tight inequality checking equation %d to see if it is redundant: ------------------------------------------- eliminating variable using Fourier-Motzkin. TOO MANY EQUATIONS; %d equations, %d variables, ELIMINATING REDUNDANT ONES END ELIMINATION OF REDUNDANT EQUATIONS For %s, exact, score = %d*%d, range = %d ... %d, lucky = %d, in_approximate_mode=%d For %s, non-exact, score = %d*%d,range = %d ... %d going to eliminate %s, (%d,%d,%d) therefore, %c%d <= %c%s%c <= %d%c adding equality %d to outer problem Solve depth = %d, in_approximate_mode = %d, aborting adding equation to handle safe variable result of non-exact elimination: found two equations to combine, i = %s, alpha1 = %d, alpha2 = %d;comparing against: red equation#%d is dead (%d dead so far, %d remain) in eliminate RED, easy tests done: no need to check other red equations after free red eliminations: checks for upper/lower bounds worked! *** Doing potentially expensive elimination tests for red equations ******************** Redundant Red Equations eliminated!! ******************** Red Equations remain omega_alloc_problem query_coupled_variable omega_constrain_variable_value omega_constrain_variable_sign omega_unprotect_variable omega_safe_var_p omega_simplify_approximate omega_problem_has_red_equations resurrect_subs normalize_omega_problem coalesce omega_solve_problem omega_solve_eq omega_do_elimination omega_solve_geq check_pos_mul omega_eliminate_redundant omega_pretty_print_problem -iplugindir