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    Searched defs:OpIdx (Results 1 - 10 of 10) sorted by null

  /external/llvm/include/llvm/Analysis/
ConstantsScanner.h 28 unsigned OpIdx; // Operand index
33 assert(!InstI.atEnd() && OpIdx < InstI->getNumOperands() &&
35 return isa<Constant>(InstI->getOperand(OpIdx));
39 inline constant_iterator(const Function *F) : InstI(inst_begin(F)), OpIdx(0) {
47 : InstI(inst_end(F)), OpIdx(0) {
50 inline bool operator==(const _Self& x) const { return OpIdx == x.OpIdx &&
56 return cast<Constant>(InstI->getOperand(OpIdx));
61 ++OpIdx;
64 while (OpIdx < NumOperands && !isAtConstant())
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  /external/llvm/include/llvm/CodeGen/
ScheduleDAGInstrs.h 45 /// For non data-dependent uses, OpIdx == -1.
48 int OpIdx;
51 PhysRegSUOper(SUnit *su, int op, unsigned R): SU(su), OpIdx(op), Reg(R) {}
  /external/llvm/utils/TableGen/
CodeEmitterGen.cpp 130 unsigned OpIdx;
131 if (CGI.Operands.hasOperandNamed(VarName, OpIdx)) {
133 OpIdx = CGI.Operands[OpIdx].MIOperandNo;
134 assert(!CGI.Operands.isFlatOperandNotEmitted(OpIdx) &&
144 OpIdx = NumberedOp++;
147 std::pair<unsigned, unsigned> SO = CGI.Operands.getSubOperandNumber(OpIdx);
158 " op = " + EncoderMethodName + "(MI, " + utostr(OpIdx);
165 " op = getMachineOpValue(MI, MI.getOperand(" + utostr(OpIdx) + ")";
CodeGenInstruction.cpp 134 unsigned OpIdx;
135 if (hasOperandNamed(Name, OpIdx)) return OpIdx;
141 /// given name. If so, return true and set OpIdx to the index of the
143 bool CGIOperandList::hasOperandNamed(StringRef Name, unsigned &OpIdx) const {
147 OpIdx = i;
170 unsigned OpIdx = getOperandNamed(OpName);
174 if (OperandList[OpIdx].MINumOperands > 1 && !AllowWholeOp &&
180 return std::make_pair(OpIdx, 0U);
184 DagInit *MIOpInfo = OperandList[OpIdx].MIOperandInfo
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  /external/llvm/lib/Target/ARM/
ARMExpandPseudoInsts.cpp 385 unsigned OpIdx = 0;
387 bool DstIsDead = MI.getOperand(OpIdx).isDead();
388 unsigned DstReg = MI.getOperand(OpIdx++).getReg();
400 MIB.addOperand(MI.getOperand(OpIdx++));
403 MIB.addOperand(MI.getOperand(OpIdx++));
404 MIB.addOperand(MI.getOperand(OpIdx++));
407 MIB.addOperand(MI.getOperand(OpIdx++));
414 SrcOpIdx = OpIdx++;
417 MIB.addOperand(MI.getOperand(OpIdx++));
418 MIB.addOperand(MI.getOperand(OpIdx++))
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ARMCodeEmitter.cpp 103 unsigned OpIdx);
156 unsigned getMachineOpValue(const MachineInstr &MI, unsigned OpIdx) const {
157 return getMachineOpValue(MI, MI.getOperand(OpIdx));
253 uint32_t getLdStmModeOpValue(const MachineInstr &MI, unsigned OpIdx)
255 uint32_t getLdStSORegOpValue(const MachineInstr &MI, unsigned OpIdx)
295 uint32_t getAddrMode2OpValue(const MachineInstr &MI, unsigned OpIdx)
297 uint32_t getAddrMode2OffsetOpValue(const MachineInstr &MI, unsigned OpIdx)
299 uint32_t getPostIdxRegOpValue(const MachineInstr &MI, unsigned OpIdx)
301 uint32_t getAddrMode3OffsetOpValue(const MachineInstr &MI, unsigned OpIdx)
378 unsigned encodeVFPRd(const MachineInstr &MI, unsigned OpIdx) const
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ARMBaseInstrInfo.cpp     [all...]
  /external/llvm/lib/CodeGen/
MachineInstr.cpp     [all...]
RegisterCoalescer.cpp 659 unsigned OpIdx = NewMI->findRegisterUseOperandIdx(IntA.reg, false);
660 NewMI->getOperand(OpIdx).setIsKill();
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  /external/llvm/lib/Target/X86/
X86ISelLowering.cpp     [all...]

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