| /external/llvm/lib/Transforms/Scalar/ |
| CodeGenPrepare.cpp | 827 /// ExtAddrMode - This is an extended version of TargetLowering::AddrMode
829 struct ExtAddrMode : public TargetLowering::AddrMode {
896 /// AddrMode - This is the addressing mode that we're building up. This is
898 ExtAddrMode &AddrMode;
908 : AddrModeInsts(AMI), TLI(T), AccessTy(AT), MemoryInst(MI), AddrMode(AM) {
[all...] |
| /external/llvm/lib/Target/ARM/ |
| Thumb2InstrInfo.cpp | 428 unsigned AddrMode = (Desc.TSFlags & ARMII::AddrModeMask);
433 AddrMode = ARMII::AddrModeT2_i12; // FIXME. mode for thumb2?
503 if (AddrMode == ARMII::AddrMode4 || AddrMode == ARMII::AddrMode6)
509 if (AddrMode == ARMII::AddrModeT2_so) {
519 AddrMode = ARMII::AddrModeT2_i12;
524 if (AddrMode == ARMII::AddrModeT2_i8 || AddrMode == ARMII::AddrModeT2_i12) {
538 } else if (AddrMode == ARMII::AddrMode5) {
552 } else if (AddrMode == ARMII::AddrModeT2_i8s4)
[all...] |
| ARMBaseRegisterInfo.cpp | 428 unsigned AddrMode = (Desc.TSFlags & ARMII::AddrModeMask);
432 switch (AddrMode) {
620 unsigned AddrMode = (Desc.TSFlags & ARMII::AddrModeMask);
629 if (AddrMode == ARMII::AddrMode4 || AddrMode == ARMII::AddrMode6)
635 switch (AddrMode) {
|
| ARMISelLowering.h | 306 virtual bool isLegalAddressingMode(const AddrMode &AM, Type *Ty)const;
307 bool isLegalT2ScaledAddressingMode(const AddrMode &AM, EVT VT) const;
|
| Thumb1RegisterInfo.cpp | 355 unsigned AddrMode = (Desc.TSFlags & ARMII::AddrModeMask);
439 if (AddrMode != ARMII::AddrModeT1_s)
652 // Use [reg, reg] addrmode. Replace the immediate operand w/ the frame
674 // Use [reg, reg] addrmode. Replace the immediate operand w/ the frame
|
| ARMBaseInstrInfo.cpp | 150 unsigned AddrMode = (TSFlags & ARMII::AddrModeMask);
162 switch (AddrMode) {
[all...] |
| /external/llvm/lib/Target/Hexagon/MCTargetDesc/ |
| HexagonBaseInfo.h | 62 enum AddrMode {
|
| /external/llvm/lib/Target/ARM/MCTargetDesc/ |
| ARMBaseInfo.h | 234 enum AddrMode {
254 inline static const char *AddrModeToString(AddrMode addrmode) {
255 switch (addrmode) {
325 AddrModeMask = 0x1f, // The AddrMode enums are declared in ARMBaseInfo.h
|
| /external/llvm/lib/Target/Hexagon/ |
| HexagonISelLowering.h | 165 virtual bool isLegalAddressingMode(const AddrMode &AM, Type *Ty) const;
|
| HexagonISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/NVPTX/ |
| NVPTXISelLowering.h | 100 virtual bool isLegalAddressingMode(const AddrMode &AM, Type *Ty) const;
|
| /external/llvm/lib/CodeGen/ |
| BasicTargetTransformInfo.cpp | 142 TargetLoweringBase::AddrMode AM;
153 TargetLoweringBase::AddrMode AM;
|
| TargetLoweringBase.cpp | [all...] |
| /external/llvm/lib/Target/SystemZ/ |
| SystemZISelLowering.h | 134 virtual bool isLegalAddressingMode(const AddrMode &AM, Type *Ty) const
|
| /external/llvm/lib/Target/XCore/ |
| XCoreISelLowering.h | 106 virtual bool isLegalAddressingMode(const AddrMode &AM,
|
| /external/chromium_org/v8/src/arm/ |
| assembler-arm.h | 593 explicit MemOperand(Register rn, int32_t offset = 0, AddrMode am = Offset);
598 explicit MemOperand(Register rn, Register rm, AddrMode am = Offset);
604 ShiftOp shift_op, int shift_imm, AddrMode am = Offset);
607 AddrMode am = Offset)) {
624 AddrMode am() const { return am_; }
636 AddrMode am_; // bits P, U, and W
648 explicit NeonMemOperand(Register rn, AddrMode am = Offset, int align = 0);
[all...] |
| constants-arm.h | 278 enum AddrMode {
|
| assembler-arm.cc | 368 MemOperand::MemOperand(Register rn, int32_t offset, AddrMode am) {
376 MemOperand::MemOperand(Register rn, Register rm, AddrMode am) {
386 ShiftOp shift_op, int shift_imm, AddrMode am) {
396 NeonMemOperand::NeonMemOperand(Register rn, AddrMode am, int align) {
[all...] |
| /external/v8/src/arm/ |
| assembler-arm.h | 459 explicit MemOperand(Register rn, int32_t offset = 0, AddrMode am = Offset);
464 explicit MemOperand(Register rn, Register rm, AddrMode am = Offset);
470 ShiftOp shift_op, int shift_imm, AddrMode am = Offset);
484 AddrMode am() const { return am_; }
496 AddrMode am_; // bits P, U, and W
[all...] |
| constants-arm.h | 318 enum AddrMode {
|
| assembler-arm.cc | 208 MemOperand::MemOperand(Register rn, int32_t offset, AddrMode am) {
215 MemOperand::MemOperand(Register rn, Register rm, AddrMode am) {
225 ShiftOp shift_op, int shift_imm, AddrMode am) {
[all...] |
| /external/llvm/include/llvm/Target/ |
| TargetLowering.h | [all...] |
| /external/llvm/lib/Target/Mips/ |
| MipsISelLowering.h | 449 virtual bool isLegalAddressingMode(const AddrMode &AM, Type *Ty) const;
|
| /external/llvm/lib/Target/PowerPC/ |
| PPCISelLowering.h | 438 virtual bool isLegalAddressingMode(const AddrMode &AM, Type *Ty)const;
|
| /external/llvm/lib/Target/X86/ |
| X86ISelLowering.h | 647 virtual bool isLegalAddressingMode(const AddrMode &AM, Type *Ty)const;
[all...] |
