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Searched
refs:FramePtr
(Results
1 - 14
of
14
) sorted by null
/external/llvm/lib/Target/Sparc/
SparcRegisterInfo.cpp
93
unsigned
FramePtr
= SP::I6;
96
FramePtr
= SP::O6;
105
MI.getOperand(FIOperandNum).ChangeToRegister(
FramePtr
, false);
115
.addReg(
FramePtr
);
/external/llvm/lib/Target/X86/
X86FrameLowering.h
64
unsigned
FramePtr
) const;
X86RegisterInfo.h
48
///
FramePtr
- X86 physical register used as frame ptr.
50
unsigned
FramePtr
;
X86FrameLowering.cpp
307
unsigned
FramePtr
) const {
360
if (HasFP &&
FramePtr
== Reg)
488
unsigned
FramePtr
= RegInfo->getFrameRegister(MF);
540
if (DstReg !=
FramePtr
|| SrcReg != StackPtr)
665
unsigned
FramePtr
= RegInfo->getFrameRegister(MF);
756
.addReg(
FramePtr
, RegState::Kill)
770
// Change the rule for the
FramePtr
to be an "offset" rule.
771
unsigned DwarfFramePtr = RegInfo->getDwarfRegNum(
FramePtr
, true);
778
TII.get(Is64Bit ? X86::MOV64rr : X86::MOV32rr),
FramePtr
)
789
unsigned DwarfFramePtr = RegInfo->getDwarfRegNum(
FramePtr
, true)
[
all
...]
X86RegisterInfo.cpp
75
FramePtr
= X86::RBP;
79
FramePtr
= X86::EBP;
422
if (!MRI->canReserveReg(
FramePtr
))
452
if (Reg ==
FramePtr
&& TFI->hasFP(MF)) {
474
BasePtr = (FrameIndex < 0 ?
FramePtr
: getBaseRegister());
476
BasePtr = (FrameIndex < 0 ?
FramePtr
: StackPtr);
480
BasePtr = (TFI->hasFP(MF) ?
FramePtr
: StackPtr);
512
return TFI->hasFP(MF) ?
FramePtr
: StackPtr;
/external/llvm/lib/Target/ARM/
Thumb1FrameLowering.cpp
96
unsigned
FramePtr
= RegInfo->getFrameRegister(MF);
128
if (Reg ==
FramePtr
)
137
if (Reg ==
FramePtr
)
174
AddDefaultPred(BuildMI(MBB, MBBI, dl, TII.get(ARM::tADDrSPi),
FramePtr
)
257
unsigned
FramePtr
= RegInfo->getFrameRegister(MF);
285
emitThumbRegPlusImmediate(MBB, MBBI, dl, ARM::R4,
FramePtr
, -NumBytes,
293
.addReg(
FramePtr
));
ARMBaseRegisterInfo.h
79
///
FramePtr
- ARM physical register used as frame ptr.
80
unsigned
FramePtr
;
ARMBaseRegisterInfo.cpp
48
FramePtr
((STI.isTargetDarwin() || STI.isThumb()) ? ARM::R7 : ARM::R11),
112
Reserved.set(
FramePtr
);
332
if (!MRI->canReserveReg(
FramePtr
))
370
return
FramePtr
;
ARMFrameLowering.cpp
149
unsigned
FramePtr
= RegInfo->getFrameRegister(MF);
183
if (Reg ==
FramePtr
)
192
if (Reg ==
FramePtr
)
225
BuildMI(MBB, MBBI, dl, TII.get(ADDriOpc),
FramePtr
)
364
unsigned
FramePtr
= RegInfo->getFrameRegister(MF);
396
emitARMRegPlusImmediate(MBB, MBBI, dl, ARM::SP,
FramePtr
, -NumBytes,
408
emitT2RegPlusImmediate(MBB, MBBI, dl, ARM::R4,
FramePtr
, -NumBytes,
418
.addReg(
FramePtr
).addImm((unsigned)ARMCC::AL).addReg(0).addReg(0);
422
.addReg(
FramePtr
));
[
all
...]
ARMAsmPrinter.cpp
[
all
...]
ARMExpandPseudoInsts.cpp
[
all
...]
ARMFastISel.cpp
[
all
...]
/external/llvm/lib/Target/XCore/
XCoreFrameLowering.cpp
161
unsigned
FramePtr
= XCore::R10;
162
BuildMI(MBB, MBBI, dl, TII.get(XCore::LDAWSP_ru6),
FramePtr
)
184
unsigned
FramePtr
= XCore::R10;
186
.addReg(
FramePtr
);
/external/llvm/lib/CodeGen/
SjLjEHPrepare.cpp
423
Value *
FramePtr
= Builder.CreateConstGEP2_32(JBufPtr, 0, 0, "jbuf_fp_gep");
426
Builder.CreateStore(Val,
FramePtr
, /*isVolatile=*/true);
Completed in 369 milliseconds