| /external/clang/lib/CodeGen/ |
| ABIInfo.h | 79 bool InReg;
85 BoolData1(B1), InReg(IR), PaddingInReg(PIR) {}
162 return InReg;
|
| TargetInfo.cpp | 471 // Floating-point types don't go inreg.
939 bool InReg = shouldUseInReg(Ty, FreeRegs, IsFastCall, NeedsPadding);
942 if (InReg)
946 if (InReg)
[all...] |
| CGCall.cpp | [all...] |
| /external/llvm/include/llvm/Target/ |
| TargetCallingConv.h | 31 static const uint64_t InReg = 1ULL<<2; ///< Passed in register
62 bool isInReg() const { return Flags & InReg; }
|
| TargetLowering.h | [all...] |
| /external/llvm/include/llvm/IR/ |
| Attributes.h | 75 InReg, ///< Force argument to be passed in register
|
| /external/llvm/lib/IR/ |
| Attributes.cpp | 171 if (hasAttribute(Attribute::InReg))
172 return "inreg";
351 case Attribute::InReg: return 1 << 3;
[all...] |
| Verifier.cpp | 805 Attrs.hasAttribute(Idx, Attribute::InReg)) ||
807 Attrs.hasAttribute(Idx, Attribute::InReg))), "Attributes "
808 "'byval, nest, and inreg' are incompatible!", V);
[all...] |
| /external/llvm/lib/Target/X86/ |
| X86FastISel.cpp | [all...] |
| X86ISelLowering.cpp | [all...] |
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| SelectionDAGBuilder.cpp | [all...] |
| /external/llvm/lib/CodeGen/ |
| TargetLoweringBase.cpp | [all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMFastISel.cpp | [all...] |
| /external/llvm/lib/Bitcode/Writer/ |
| BitcodeWriter.cpp | 178 case Attribute::InReg:
[all...] |
| /external/llvm/lib/Target/CppBackend/ |
| CPPBackend.cpp | 490 HANDLE_ATTR(InReg);
[all...] |
| /external/llvm/lib/AsmParser/ |
| LLParser.cpp | [all...] |
| /external/llvm/lib/Bitcode/Reader/ |
| BitcodeReader.cpp | 532 *Kind = Attribute::InReg;
[all...] |
