| /external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/ |
| AMDGPUCodeEmitter.h | 21 uint64_t getBinaryCodeForInstr(const MachineInstr &MI) const;
22 virtual uint64_t getMachineOpValue(const MachineInstr &MI,
24 virtual unsigned GPR4AlignEncode(const MachineInstr &MI,
28 virtual unsigned GPR2AlignEncode(const MachineInstr &MI,
32 virtual uint64_t VOPPostEncode(const MachineInstr &MI,
36 virtual uint64_t i32LiteralEncode(const MachineInstr &MI,
40 virtual uint32_t SMRDmemriEncode(const MachineInstr &MI, unsigned OpNo)
|
| /external/mesa3d/src/gallium/drivers/radeon/ |
| AMDGPUCodeEmitter.h | 21 uint64_t getBinaryCodeForInstr(const MachineInstr &MI) const;
22 virtual uint64_t getMachineOpValue(const MachineInstr &MI,
24 virtual unsigned GPR4AlignEncode(const MachineInstr &MI,
28 virtual unsigned GPR2AlignEncode(const MachineInstr &MI,
32 virtual uint64_t VOPPostEncode(const MachineInstr &MI,
36 virtual uint64_t i32LiteralEncode(const MachineInstr &MI,
40 virtual uint32_t SMRDmemriEncode(const MachineInstr &MI, unsigned OpNo)
|
| /external/llvm/lib/Target/X86/InstPrinter/ |
| X86ATTInstPrinter.h | 30 virtual void printInst(const MCInst *MI, raw_ostream &OS, StringRef Annot);
34 bool printAliasInstr(const MCInst *MI, raw_ostream &OS);
37 void printInstruction(const MCInst *MI, raw_ostream &OS);
40 void printOperand(const MCInst *MI, unsigned OpNo, raw_ostream &OS);
41 void printMemReference(const MCInst *MI, unsigned Op, raw_ostream &OS);
42 void printSSECC(const MCInst *MI, unsigned Op, raw_ostream &OS);
43 void printAVXCC(const MCInst *MI, unsigned Op, raw_ostream &OS);
44 void printPCRelImm(const MCInst *MI, unsigned OpNo, raw_ostream &OS);
46 void printopaquemem(const MCInst *MI, unsigned OpNo, raw_ostream &O) {
47 printMemReference(MI, OpNo, O)
[all...] |
| X86IntelInstPrinter.h | 31 virtual void printInst(const MCInst *MI, raw_ostream &OS, StringRef Annot);
34 void printInstruction(const MCInst *MI, raw_ostream &O);
37 void printOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O);
38 void printMemReference(const MCInst *MI, unsigned Op, raw_ostream &O);
39 void printSSECC(const MCInst *MI, unsigned Op, raw_ostream &O);
40 void printAVXCC(const MCInst *MI, unsigned Op, raw_ostream &O);
41 void printPCRelImm(const MCInst *MI, unsigned OpNo, raw_ostream &O);
43 void printopaquemem(const MCInst *MI, unsigned OpNo, raw_ostream &O) {
45 printMemReference(MI, OpNo, O);
48 void printi8mem(const MCInst *MI, unsigned OpNo, raw_ostream &O)
[all...] |
| X86InstComments.cpp | 29 void llvm::EmitAnyX86InstComments(const MCInst *MI, raw_ostream &OS,
35 switch (MI->getOpcode()) {
38 DestName = getRegName(MI->getOperand(0).getReg());
39 Src1Name = getRegName(MI->getOperand(1).getReg());
40 Src2Name = getRegName(MI->getOperand(2).getReg());
41 DecodeINSERTPSMask(MI->getOperand(3).getImm(), ShuffleMask);
46 Src2Name = getRegName(MI->getOperand(2).getReg());
47 Src1Name = getRegName(MI->getOperand(1).getReg());
48 DestName = getRegName(MI->getOperand(0).getReg());
54 Src2Name = getRegName(MI->getOperand(2).getReg())
[all...] |
| /external/llvm/lib/Target/R600/InstPrinter/ |
| AMDGPUInstPrinter.h | 29 void printInstruction(const MCInst *MI, raw_ostream &O);
32 virtual void printInst(const MCInst *MI, raw_ostream &O, StringRef Annot);
35 void printOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O);
36 void printInterpSlot(const MCInst *MI, unsigned OpNum, raw_ostream &O);
37 void printMemOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O);
38 void printIfSet(const MCInst *MI, unsigned OpNo, raw_ostream &O,
40 void printAbs(const MCInst *MI, unsigned OpNo, raw_ostream &O);
41 void printClamp(const MCInst *MI, unsigned OpNo, raw_ostream &O);
42 void printLiteral(const MCInst *MI, unsigned OpNo, raw_ostream &O);
43 void printLast(const MCInst *MI, unsigned OpNo, raw_ostream &O)
[all...] |
| /external/llvm/lib/Target/ARM/InstPrinter/ |
| ARMInstPrinter.h | 29 virtual void printInst(const MCInst *MI, raw_ostream &O, StringRef Annot);
33 void printInstruction(const MCInst *MI, raw_ostream &O);
37 void printOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O);
39 void printSORegRegOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O);
40 void printSORegImmOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O);
42 void printAddrModeTBB(const MCInst *MI, unsigned OpNum, raw_ostream &O);
43 void printAddrModeTBH(const MCInst *MI, unsigned OpNum, raw_ostream &O);
44 void printAddrMode2Operand(const MCInst *MI, unsigned OpNum, raw_ostream &O);
45 void printAM2PostIndexOp(const MCInst *MI, unsigned OpNum, raw_ostream &O);
46 void printAM2PreOrOffsetIndexOp(const MCInst *MI, unsigned OpNum
[all...] |
| /external/llvm/lib/CodeGen/ |
| AntiDepBreaker.h | 54 virtual void Observe(MachineInstr *MI, unsigned Count,
62 void UpdateDbgValue(MachineInstr *MI, unsigned OldReg, unsigned NewReg) {
63 assert (MI->isDebugValue() && "MI is not DBG_VALUE!");
64 if (MI && MI->getOperand(0).isReg() && MI->getOperand(0).getReg() == OldReg)
65 MI->getOperand(0).setReg(NewReg);
|
| ExpandPostRAPseudos.cpp | 49 bool LowerSubregToReg(MachineInstr *MI);
50 bool LowerCopy(MachineInstr *MI);
52 void TransferImplicitDefs(MachineInstr *MI);
62 /// TransferImplicitDefs - MI is a pseudo-instruction, and the lowered
64 /// operands from MI to the replacement instruction.
66 ExpandPostRA::TransferImplicitDefs(MachineInstr *MI) {
67 MachineBasicBlock::iterator CopyMI = MI;
70 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
71 MachineOperand &MO = MI->getOperand(i);
78 bool ExpandPostRA::LowerSubregToReg(MachineInstr *MI) {
[all...] |
| ErlangGC.cpp | 31 MachineBasicBlock::iterator MI,
54 MachineBasicBlock::iterator MI,
58 BuildMI(MBB, MI, DL, TII->get(TargetOpcode::GC_LABEL)).addSym(Label);
65 for (MachineBasicBlock::iterator MI = BBI->begin(), ME = BBI->end();
66 MI != ME; ++MI)
68 if (MI->getDesc().isCall()) {
71 if (MI->getDesc().isTerminator())
75 MachineBasicBlock::iterator RAI = MI; ++RAI;
76 MCSymbol* Label = InsertLabel(*MI->getParent(), RAI, MI->getDebugLoc())
[all...] |
| /external/llvm/lib/Target/PowerPC/InstPrinter/ |
| PPCInstPrinter.h | 35 virtual void printInst(const MCInst *MI, raw_ostream &O, StringRef Annot);
38 void printInstruction(const MCInst *MI, raw_ostream &O);
42 void printOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O);
43 void printPredicateOperand(const MCInst *MI, unsigned OpNo,
47 void printS5ImmOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O);
48 void printU5ImmOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O);
49 void printU6ImmOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O);
50 void printS16ImmOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O);
51 void printU16ImmOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O);
52 void printBranchOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O)
[all...] |
| /external/llvm/lib/Target/SystemZ/InstPrinter/ |
| SystemZInstPrinter.h | 30 void printInstruction(const MCInst *MI, raw_ostream &O);
43 virtual void printInst(const MCInst *MI, raw_ostream &O, StringRef Annot)
48 void printOperand(const MCInst *MI, int OpNum, raw_ostream &O);
49 void printBDAddrOperand(const MCInst *MI, int OpNum, raw_ostream &O);
50 void printBDXAddrOperand(const MCInst *MI, int OpNum, raw_ostream &O);
51 void printBDLAddrOperand(const MCInst *MI, int OpNum, raw_ostream &O);
52 void printU4ImmOperand(const MCInst *MI, int OpNum, raw_ostream &O);
53 void printU6ImmOperand(const MCInst *MI, int OpNum, raw_ostream &O);
54 void printS8ImmOperand(const MCInst *MI, int OpNum, raw_ostream &O);
55 void printU8ImmOperand(const MCInst *MI, int OpNum, raw_ostream &O)
[all...] |
| /external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/InstPrinter/ |
| AMDGPUInstPrinter.cpp | 7 void AMDGPUInstPrinter::printInst(const MCInst *MI, raw_ostream &OS,
9 printInstruction(MI, OS);
14 void AMDGPUInstPrinter::printOperand(const MCInst *MI, unsigned OpNo,
17 const MCOperand &Op = MI->getOperand(OpNo);
29 void AMDGPUInstPrinter::printMemOperand(const MCInst *MI, unsigned OpNo,
31 printOperand(MI, OpNo, O);
|
| /external/llvm/lib/Target/SystemZ/MCTargetDesc/ |
| SystemZMCCodeEmitter.cpp | 37 virtual void EncodeInstruction(const MCInst &MI, raw_ostream &OS,
43 uint64_t getBinaryCodeForInstr(const MCInst &MI,
47 // MO in MI. Fixups is the list of fixups against MI.
48 uint64_t getMachineOpValue(const MCInst &MI, const MCOperand &MO,
55 uint64_t getBDAddr12Encoding(const MCInst &MI, unsigned OpNum,
57 uint64_t getBDAddr20Encoding(const MCInst &MI, unsigned OpNum,
59 uint64_t getBDXAddr12Encoding(const MCInst &MI, unsigned OpNum,
61 uint64_t getBDXAddr20Encoding(const MCInst &MI, unsigned OpNum,
63 uint64_t getBDLAddr12Len8Encoding(const MCInst &MI, unsigned OpNum
[all...] |
| /external/mesa3d/src/gallium/drivers/radeon/InstPrinter/ |
| AMDGPUInstPrinter.cpp | 7 void AMDGPUInstPrinter::printInst(const MCInst *MI, raw_ostream &OS,
9 printInstruction(MI, OS);
14 void AMDGPUInstPrinter::printOperand(const MCInst *MI, unsigned OpNo,
17 const MCOperand &Op = MI->getOperand(OpNo);
29 void AMDGPUInstPrinter::printMemOperand(const MCInst *MI, unsigned OpNo,
31 printOperand(MI, OpNo, O);
|
| /external/llvm/lib/Target/Hexagon/ |
| HexagonAsmPrinter.h | 39 virtual void EmitInstruction(const MachineInstr *MI);
43 void printOperand(const MachineInstr *MI, unsigned OpNo, raw_ostream &O);
44 bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
47 bool PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNo,
55 void printInstruction(const MachineInstr *MI, raw_ostream &O);
57 // void printMachineInstruction(const MachineInstr *MI);
69 void printImmOperand(const MachineInstr *MI, unsigned OpNo,
71 int value = MI->getOperand(OpNo).getImm();
75 void printNegImmOperand(const MachineInstr *MI, unsigned OpNo,
77 int value = MI->getOperand(OpNo).getImm()
[all...] |
| HexagonRegisterInfo.cpp | 126 MachineInstr &MI = *II;
127 int FrameIndex = MI.getOperand(FIOperandNum).getIndex();
130 MachineFunction &MF = *MI.getParent()->getParent();
146 TII.isValidOffset(MI.getOpcode(), (FrameSize+Offset)) &&
147 !TII.isSpillPredRegOp(&MI)) {
149 MI.getOperand(FIOperandNum).ChangeToRegister(getStackRegister(), false,
151 MI.getOperand(FIOperandNum + 1).ChangeToImmediate(FrameSize+Offset);
154 if (!TII.isValidOffset(MI.getOpcode(), Offset)) {
163 if ( (MI.getOpcode() == Hexagon::LDriw) ||
164 (MI.getOpcode() == Hexagon::LDrid) |
[all...] |
| HexagonSplitTFRCondSets.cpp | 91 MachineInstr *MI = MII;
93 switch(MI->getOpcode()) {
97 int DestReg = MI->getOperand(0).getReg();
98 int SrcReg1 = MI->getOperand(2).getReg();
99 int SrcReg2 = MI->getOperand(3).getReg();
101 if (MI->getOpcode() == Hexagon::TFR_condset_rr ||
102 MI->getOpcode() == Hexagon::TFR_condset_rr_f) {
106 else if (MI->getOpcode() == Hexagon::TFR_condset_rr64_f) {
114 BuildMI(*MBB, MII, MI->getDebugLoc(), TII->get(Opc1),
115 DestReg).addReg(MI->getOperand(1).getReg()).addReg(SrcReg1)
[all...] |
| HexagonMachineFunctionInfo.h | 48 void addAllocaAdjustInst(MachineInstr* MI) {
49 AllocaAdjustInsts.push_back(MI);
58 void setStartPacket(MachineInstr* MI) {
59 PacketInfo[MI] |= Hexagon::StartPacket;
61 void setEndPacket(MachineInstr* MI) {
62 PacketInfo[MI] |= Hexagon::EndPacket;
64 bool isStartPacket(const MachineInstr* MI) const {
65 return (PacketInfo.count(MI) &&
66 (PacketInfo.find(MI)->second & Hexagon::StartPacket));
68 bool isEndPacket(const MachineInstr* MI) const
[all...] |
| HexagonSplitConst32AndConst64.cpp | 82 MachineInstr *MI = MII;
83 int Opc = MI->getOpcode();
85 int DestReg = MI->getOperand(0).getReg();
86 MachineOperand &Symbol = MI->getOperand (1);
88 BuildMI (*MBB, MII, MI->getDebugLoc(),
90 BuildMI (*MBB, MII, MI->getDebugLoc(),
94 MII = MBB->erase (MI);
98 int DestReg = MI->getOperand(0).getReg();
99 MachineOperand &Symbol = MI->getOperand (1);
101 BuildMI (*MBB, MII, MI->getDebugLoc()
[all...] |
| /external/llvm/lib/Target/AArch64/InstPrinter/ |
| AArch64InstPrinter.h | 32 void printInstruction(const MCInst *MI, raw_ostream &O);
33 bool printAliasInstr(const MCInst *MI, raw_ostream &O);
40 void printAddrRegExtendOperand(const MCInst *MI, unsigned OpNum,
42 printAddrRegExtendOperand(MI, OpNum, O, MemSize, RmSize);
46 void printAddrRegExtendOperand(const MCInst *MI, unsigned OpNum,
50 void printAddSubImmLSL0Operand(const MCInst *MI,
52 void printAddSubImmLSL12Operand(const MCInst *MI,
55 void printBareImmOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O);
58 void printBFILSBOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O);
59 void printBFIWidthOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O)
[all...] |
| /external/llvm/lib/Target/Mips/InstPrinter/ |
| MipsInstPrinter.cpp | 30 static bool isReg(const MCInst &MI, unsigned OpNo) {
31 assert(MI.getOperand(OpNo).isReg() && "Register operand expected.");
32 return MI.getOperand(OpNo).getReg() == R;
77 void MipsInstPrinter::printInst(const MCInst *MI, raw_ostream &O,
79 switch (MI->getOpcode()) {
89 if (!printAliasInstr(MI, O) && !printAlias(*MI, O))
90 printInstruction(MI, O);
93 switch (MI->getOpcode()) {
161 void MipsInstPrinter::printOperand(const MCInst *MI, unsigned OpNo
[all...] |
| /external/llvm/lib/Target/Hexagon/InstPrinter/ |
| HexagonInstPrinter.h | 30 virtual void printInst(const MCInst *MI, raw_ostream &O, StringRef Annot);
31 void printInst(const HexagonMCInst *MI, raw_ostream &O, StringRef Annot);
33 void printInstruction(const MCInst *MI, raw_ostream &O);
37 void printOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O) const;
38 void printImmOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O) const;
39 void printExtOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O) const;
40 void printUnsignedImmOperand(const MCInst *MI, unsigned OpNo,
42 void printNegImmOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O)
44 void printNOneImmOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O)
46 void printMEMriOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O
[all...] |
| HexagonInstPrinter.cpp | 41 void HexagonInstPrinter::printInst(const MCInst *MI, raw_ostream &O,
43 printInst((const HexagonMCInst*)(MI), O, Annot);
46 void HexagonInstPrinter::printInst(const HexagonMCInst *MI, raw_ostream &O,
51 if (MI->getOpcode() == Hexagon::ENDLOOP0) {
53 assert(MI->isPacketEnd() && "Loop-end must also end the packet");
55 if (MI->isPacketStart()) {
62 Nop.setPacketStart (MI->isPacketStart());
67 if (MI->isPacketEnd())
70 printInstruction(MI, O);
74 if (MI->isPacketStart()
[all...] |
| /external/llvm/lib/Target/R600/ |
| SILowerControlFlow.cpp | 75 void SkipIfDead(MachineInstr &MI);
77 void If(MachineInstr &MI);
78 void Else(MachineInstr &MI);
79 void Break(MachineInstr &MI);
80 void IfBreak(MachineInstr &MI);
81 void ElseBreak(MachineInstr &MI);
82 void Loop(MachineInstr &MI);
83 void EndCf(MachineInstr &MI);
85 void Kill(MachineInstr &MI);
86 void Branch(MachineInstr &MI);
[all...] |
