/external/kernel-headers/original/asm-x86/ |
ptrace-abi.h | 35 #define R11 48 52 #define ARGOFFSET R11
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/prebuilts/gcc/linux-x86/host/i686-linux-glibc2.7-4.4.3/sysroot/usr/include/asm/ |
ptrace-abi.h | 35 #define R11 48 52 #define ARGOFFSET R11
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/prebuilts/gcc/linux-x86/host/i686-linux-glibc2.7-4.6/sysroot/usr/include/asm/ |
ptrace-abi.h | 35 #define R11 48 52 #define ARGOFFSET R11
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/prebuilts/gcc/linux-x86/host/x86_64-linux-glibc2.7-4.6/sysroot/usr/include/asm/ |
ptrace-abi.h | 35 #define R11 48 52 #define ARGOFFSET R11
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/prebuilts/ndk/4/platforms/android-5/arch-x86/usr/include/asm/ |
ptrace-abi.h | 46 #define R11 48 62 #define ARGOFFSET R11
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/prebuilts/ndk/4/platforms/android-8/arch-x86/usr/include/asm/ |
ptrace-abi.h | 46 #define R11 48 62 #define ARGOFFSET R11
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/prebuilts/ndk/6/platforms/android-9/arch-x86/usr/include/asm/ |
ptrace-abi.h | 46 #define R11 48 62 #define ARGOFFSET R11
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/prebuilts/ndk/7/platforms/android-14/arch-x86/usr/include/asm/ |
ptrace-abi.h | 46 #define R11 48 62 #define ARGOFFSET R11
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/prebuilts/ndk/7/platforms/android-9/arch-x86/usr/include/asm/ |
ptrace-abi.h | 46 #define R11 48 62 #define ARGOFFSET R11
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/prebuilts/gcc/linux-x86/host/i686-linux-glibc2.7-4.4.3/sysroot/usr/include/sys/ |
reg.h | 34 # define R11 6
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/prebuilts/gcc/linux-x86/host/i686-linux-glibc2.7-4.6/sysroot/usr/include/sys/ |
reg.h | 34 # define R11 6
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/prebuilts/gcc/linux-x86/host/x86_64-linux-glibc2.7-4.6/sysroot/usr/include/sys/ |
reg.h | 34 # define R11 6
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/art/runtime/arch/arm/ |
registers_arm.h | 38 R11 = 11,
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/external/llvm/lib/Target/Hexagon/ |
HexagonRegisterInfo.h | 27 // are still a few places that R11 and R10 are hard wired. 37 #define HEXAGON_RESERVED_REG_2 Hexagon::R11
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/external/llvm/lib/Target/ARM/ |
ARMBaseRegisterInfo.h | 45 case R8: case R9: case R10: case R11: 56 case R8: case R9: case R10: case R11:
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Thumb1FrameLowering.cpp | 136 case ARM::R11:
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/art/compiler/jni/quick/arm/ |
calling_convention_arm.cc | 130 callee_save_regs_.push_back(ArmManagedRegister::FromCoreRegister(R11)); 136 result = 1 << R5 | 1 << R6 | 1 << R7 | 1 << R8 | 1 << R10 | 1 << R11 | 1 << LR;
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/external/valgrind/main/coregrind/m_sigframe/ |
sigframe-arm-linux.c | 149 SC2(fp,R11); 328 REST(fp,R11);
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/external/llvm/lib/Transforms/InstCombine/ |
InstCombineAndOrXor.cpp | 568 Value *R11,*R12; 570 if (decomposeBitTestICmp(RHS, RHSCC, R11, R12, R2)) { 571 if (R11 == L11 || R11 == L12 || R11 == L21 || R11 == L22) { 572 A = R11; D = R12; 574 A = R12; D = R11; 579 } else if (match(R1, m_And(m_Value(R11), m_Value(R12)))) { 580 if (R11 == L11 || R11 == L12 || R11 == L21 || R11 == L22) [all...] |
/external/llvm/lib/Target/X86/ |
X86RegisterInfo.cpp | 574 case X86::R11B: case X86::R11W: case X86::R11D: case X86::R11: 611 case X86::R11B: case X86::R11W: case X86::R11D: case X86::R11: 647 case X86::R11B: case X86::R11W: case X86::R11D: case X86::R11: 683 case X86::R11B: case X86::R11W: case X86::R11D: case X86::R11: 684 return X86::R11;
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/external/llvm/lib/Target/PowerPC/ |
PPCAsmPrinter.cpp | [all...] |
/external/llvm/lib/Target/X86/Disassembler/ |
X86DisassemblerDecoder.h | 172 ENTRY(R11) \ 190 ENTRY(R11) \
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/system/core/libpixelflinger/codeflinger/ |
ARMAssemblerInterface.h | 50 R0, R1, R2, R3, R4, R5, R6, R7, R8, R9, R10, R11, R12, R13, R14, R15, 58 LIST(R7), LIST(R8), LIST(R9), LIST(R10), LIST(R11), LIST(R12),
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/external/valgrind/main/VEX/auxprogs/ |
genoffsets.c | 111 GENOFFSET(AMD64,amd64,R11);
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/external/llvm/lib/Target/X86/MCTargetDesc/ |
X86BaseInfo.h | 668 case X86::R8: case X86::R9: case X86::R10: case X86::R11:
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