| /external/llvm/lib/Transforms/Vectorize/ |
| SLPVectorizer.cpp | 738 case Instruction::FSub:
852 case Instruction::FSub:
[all...] |
| /external/llvm/lib/Target/PowerPC/ |
| README.txt | 170 fsub f0, f0, f1
876 %D = fsub double -0.000000e+00, %A ; <double> [#uses=1]
|
| /external/llvm/lib/Target/Sparc/ |
| SparcInstrInfo.td | 664 [(set f32:$dst, (fsub f32:$src1, f32:$src2))]>;
668 [(set f64:$dst, (fsub f64:$src1, f64:$src2))]>;
[all...] |
| /external/llvm/lib/Transforms/InstCombine/ |
| InstCombineSelect.cpp | [all...] |
| /external/llvm/test/CodeGen/X86/ |
| lsr-reuse.ll | 295 %t12 = fsub double %t9, %t11
342 %t12 = fsub double %t9, %t11
[all...] |
| /dalvik/docs/ |
| java-bytecode.html | 122 <tr><td>0x66</td><td>102</td><td>fsub</td></tr>
|
| /external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/ |
| R600ISelLowering.cpp | 38 setOperationAction(ISD::FSUB, MVT::f32, Expand);
|
| /external/elfutils/tests/ |
| testfile44.expect.bz2 | |
| /external/emma/core/java12/com/vladium/jcd/opcodes/ |
| IOpcodes.java | 333 "fsub", // 0x66 102
|
| /external/javassist/src/main/javassist/bytecode/analysis/ |
| Executor.java | 324 case FSUB:
[all...] |
| /external/llvm/lib/ExecutionEngine/Interpreter/ |
| Execution.cpp | 70 dbgs() << "Unhandled type for FSub instruction: " << *Ty << "\n";
742 case Instruction::FSub: FLOAT_VECTOR_OP(-) break;
772 case Instruction::FSub: executeFSubInst(R, Src1, Src2, Ty); break;
[all...] |
| /external/llvm/lib/Target/CppBackend/ |
| CPPBackend.cpp | 859 case Instruction::FSub: Out << "getFSub("; break;
[all...] |
| /external/llvm/lib/Target/R600/ |
| AMDGPUISelLowering.cpp | 268 SDValue OneSubA = DAG.getNode(ISD::FSUB, DL, VT,
|
| AMDILISelLowering.cpp | 173 setOperationAction(ISD::FSUB, MVT::v2f64, Expand);
|
| /external/llvm/test/CodeGen/Generic/ |
| 2007-05-15-InfiniteRecursion.ll | 76 %tmp201.pn.i = fsub double 1.000000e+00, %tmp199200.pn.i ; <double> [#uses=1]
|
| /external/llvm/test/CodeGen/Mips/ |
| mips64-f128.ll | 28 %sub = fsub fp128 %0, %1
|
| /external/llvm/tools/llvm-stress/ |
| llvm-stress.cpp | 341 case 1:{Op = (isFloat?Instruction::FSub : Instruction::Sub); break; }
|
| /external/mesa3d/src/gallium/drivers/radeon/ |
| R600ISelLowering.cpp | 38 setOperationAction(ISD::FSUB, MVT::f32, Expand);
|
| /external/valgrind/main/VEX/switchback/ |
| test_ppc_jm1.c | [all...] |
| /external/valgrind/main/coregrind/m_dispatch/ |
| dispatch-ppc32-linux.S | 204 /* note: fsub 3,3,3 is not a reliable way to do this,
|
| dispatch-ppc64-linux.S | 209 fsub 3,3,3 is not a reliable way to do this, since if
|
| /system/core/libpixelflinger/codeflinger/ |
| mips_disassem.c | 109 /* 0 */ "fadd", "fsub", "fmpy", "fdiv", "fsqrt","fabs", "fmov", "fneg",
|
| /external/qemu/ |
| i386-dis.c | 64 eg. `fsub %st(3),%st' results in st = st - st(3) as expected, but
65 `fsub %st,%st(3)' results in st(3) = st - st(3), rather than
[all...] |
| /external/llvm/lib/Target/AArch64/ |
| AArch64InstrInfo.td | [all...] |
| /external/llvm/include/llvm/Target/ |
| TargetSelectionDAG.td | 367 def fsub : SDNode<"ISD::FSUB" , SDTFPBinOp>;
[all...] |
