| /dalvik/vm/mterp/armv5te/ |
| footer.S | 481 @ prepare to copy args to "outs" area of current frame
488 @ r0=methodToCall, r1=CCCC, r2=count, r10=outs
491 sub r10, r10, r2, lsl #2 @ r10<- "outs" area, for call args
494 str r1, [r10], #4 @ *outs++ = val
511 @ prepare to copy args to "outs" area of current frame
517 @ r0=methodToCall, r1=GFED, r2=count, r10=outs
525 str r2, [r10, #-4]! @ *--outs = vA
529 str r2, [r10, #-4]! @ *--outs = vG
533 str r2, [r10, #-4]! @ *--outs = vF
537 str r2, [r10, #-4]! @ *--outs = v
[all...] |
| /external/clang/docs/ |
| RAVFrontendAction.rst | 131 llvm::outs() << "Found declaration at "
163 llvm::outs() << "Found declaration at "
|
| /external/clang/lib/FrontendTool/ |
| ExecuteCompilerInvocation.cpp | 183 Opts->PrintHelp(llvm::outs(), "clang -cc1",
225 ento::printCheckerHelp(llvm::outs(), Clang->getFrontendOpts().Plugins);
|
| /external/llvm/lib/Target/Hexagon/ |
| HexagonCallingConvLower.h | 84 void AnalyzeReturn(const SmallVectorImpl<ISD::OutputArg> &Outs,
89 void AnalyzeCallOperands(const SmallVectorImpl<ISD::OutputArg> &Outs,
|
| HexagonISelLowering.cpp | 303 const SmallVectorImpl<ISD::OutputArg> &Outs,
315 CCInfo.AnalyzeReturn(Outs, RetCC_Hexagon);
386 SmallVectorImpl<ISD::OutputArg> &Outs = CLI.Outs;
395 bool IsStructRet = (Outs.empty()) ? false : Outs[0].Flags.isSRet();
421 CCInfo.AnalyzeCallOperands(Outs, CC_Hexagon_VarArg);
423 CCInfo.AnalyzeCallOperands(Outs, CC_Hexagon);
432 Outs, OutVals, Ins, DAG);
460 ISD::ArgFlagsTy Flags = Outs[i].Flags
[all...] |
| /external/llvm/lib/Target/MSP430/ |
| MSP430ISelLowering.h | 131 const SmallVectorImpl<ISD::OutputArg> &Outs,
164 const SmallVectorImpl<ISD::OutputArg> &Outs,
|
| /external/llvm/lib/Target/XCore/ |
| XCoreISelLowering.h | 123 const SmallVectorImpl<ISD::OutputArg> &Outs,
190 const SmallVectorImpl<ISD::OutputArg> &Outs,
|
| /external/llvm/lib/Target/PowerPC/ |
| PPCISelLowering.h | 555 const SmallVectorImpl<ISD::OutputArg> &Outs,
561 const SmallVectorImpl<ISD::OutputArg> &Outs,
602 const SmallVectorImpl<ISD::OutputArg> &Outs,
611 const SmallVectorImpl<ISD::OutputArg> &Outs,
619 const SmallVectorImpl<ISD::OutputArg> &Outs,
|
| /dalvik/vm/mterp/out/ |
| InterpC-x86.cpp | 2035 u4* outs; local
[all...] |
| /external/clang/lib/Frontend/ |
| FrontendAction.cpp | 80 llvm::outs() << "PCH DECL: " << D->getDeclKindName();
82 llvm::outs() << " - " << *ND;
83 llvm::outs() << "\n";
|
| /external/llvm/lib/Target/R600/ |
| R600InstrFormats.td | 14 class InstR600 <dag outs, dag ins, string asm, list<dag> pattern,
16 : AMDGPUInst <outs, ins, asm, pattern> {
34 let OutOperandList = outs;
|
| /external/llvm/unittests/Support/ |
| Path.cpp | 100 outs() << " Reverse Iteration: [";
105 outs() << *ci << ',';
107 outs() << "]\n";
|
| /libcore/luni/src/main/java/java/util/concurrent/ |
| package-info.java | 99 * classes in the package contain operations based on time-outs
101 * time-outs are used, the time-out specifies the minimum time
104 * to detect time-outs as soon as possible after they occur.
|
| /external/llvm/docs/ |
| TableGenFundamentals.rst | 75 dag OutOperandList = (outs GR32:$dst);
142 def ADD32rr : I<0x01, MRMDestReg, (outs GR32:$dst),
709 def RET : I<0xC3, RawFrm, (outs), (ins), "ret", [(X86retflag 0)]>;
716 def CALLpcrel32 : Ii32<0xE8, RawFrm, (outs), (ins i32imm:$dst,variable_ops),
718 def CALL32r : I<0xFF, MRM2r, (outs), (ins GR32:$dst, variable_ops),
720 def CALL32m : I<0xFF, MRM2m, (outs), (ins i32mem:$dst, variable_ops),
|
| /external/kernel-headers/original/asm-x86/ |
| io_32.h | 334 static inline void outs##bwl(int port, const void *addr, unsigned long count) { \
335 __asm__ __volatile__("rep; outs" #bwl : "+S"(addr), "+c"(count) : "d"(port)); \
|
| /external/llvm/lib/Target/AArch64/ |
| AArch64ISelLowering.h | 159 const SmallVectorImpl<ISD::OutputArg> &Outs,
186 const SmallVectorImpl<ISD::OutputArg> &Outs,
|
| /external/llvm/tools/llvm-rtdyld/ |
| llvm-rtdyld.cpp | 164 outs() << "Function: " << Name << ", Size = " << Size << "\n";
170 outs() << " Line info @ " << It->first - Addr << ": "
|
| /external/llvm/utils/TableGen/ |
| CodeGenInstruction.h | 131 /// elements in the instruction's (outs) list.
209 /// Operands - This is information about the (ins) and (outs) list specified
|
| /external/llvm/lib/Target/Sparc/ |
| SparcISelLowering.cpp | 165 const SmallVectorImpl<ISD::OutputArg> &Outs,
169 return LowerReturn_64(Chain, CallConv, IsVarArg, Outs, OutVals, DL, DAG);
170 return LowerReturn_32(Chain, CallConv, IsVarArg, Outs, OutVals, DL, DAG);
176 const SmallVectorImpl<ISD::OutputArg> &Outs,
189 CCInfo.AnalyzeReturn(Outs, RetCC_Sparc32);
239 const SmallVectorImpl<ISD::OutputArg> &Outs,
250 CCInfo.AnalyzeReturn(Outs, CC_Sparc64);
657 SmallVectorImpl<ISD::OutputArg> &Outs = CLI.Outs;
673 CCInfo.AnalyzeCallOperands(Outs, CC_Sparc32)
[all...] |
| /dalvik/dexgen/src/com/android/dexgen/dex/code/ |
| CstInsn.java | 51 * ins or outs)
|
| /dalvik/dx/src/com/android/dx/dex/code/ |
| CstInsn.java | 51 * ins or outs)
|
| /external/chromium_org/sandbox/win/src/ |
| sharedmem_ipc_client.h | 68 // The next two constants control the time outs for the IPC.
|
| /external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/ |
| AMDGPUISelLowering.h | 52 const SmallVectorImpl<ISD::OutputArg> &Outs,
|
| /external/chromium_org/third_party/openssl/openssl/crypto/des/ |
| des.c | 131 struct stat ins,outs; local
267 (stat(out,&outs) != -1) &&
268 (ins.st_dev == outs.st_dev) &&
269 (ins.st_ino == outs.st_ino))
|
| /external/clang/unittests/Tooling/ |
| RewriterTestContext.h | 41 DiagnosticPrinter(llvm::outs(), &*DiagOpts),
|
