/external/libvpx/libvpx/vp9/encoder/x86/ |
vp9_sad4d_sse2.asm | 216 INIT_XMM sse2
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/external/libyuv/files/source/ |
scale_argb.cc | 26 // Bilinear SSE2 is disabled. 31 * SSE2 downscalers with bilinear interpolation. 189 // Bilinear row filtering combines 4x2 -> 4x1. SSE2 version. 510 // Bilinear row filtering combines 4x2 -> 4x1. SSE2 version [all...] |
/external/llvm/test/CodeGen/X86/ |
xor.ll | 1 ; RUN: llc < %s -mcpu=corei7 -march=x86 -mattr=+sse2 | FileCheck %s -check-prefix=X32
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/external/mesa3d/src/gallium/auxiliary/util/ |
u_sse.h | 193 /* Provide an SSE2 implementation of _mm_mullo_epi32() in terms of
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/external/skia/gyp/ |
common_conditions.gypi | 98 'EnableEnhancedInstructionSet': '2',# /arch:SSE2
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/external/v8/src/ |
atomicops_internals_x86_gcc.h | 43 bool has_sse2; // Processor has SSE2.
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/external/chromium_org/content/common/ |
plugin_list_posix.cc | 49 // Plugin is using SSE2 instructions without checking for SSE2 instruction 50 // support. Ban the plugin if the system has no SSE2 support.
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/external/chromium_org/media/base/ |
yuv_convert_unittest.cc | 520 LOG(WARNING) << "System doesn't support SSE2, test not executed."; 544 // Convert RGB32 to YV12 with SSE2 version. 570 // Convert RGB32 to YV12 with SSE2 version. [all...] |
/external/chromium_org/third_party/mesa/src/src/gallium/auxiliary/gallivm/ |
lp_bld_pack.c | 406 intrinsic = "llvm.x86.sse2.packssdw.128"; 420 intrinsic = "llvm.x86.sse2.packsswb.128"; 423 intrinsic = "llvm.x86.sse2.packuswb.128";
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/external/chromium_org/third_party/skia/src/opts/ |
SkBitmapProcState_opts_SSSE3.cpp | 371 // - Use of 2 special SSSE3 instructions (comparatively to the SSE2 instruction 378 // as one can see in the SSE2 implementation, all inputs have to be used as 382 // As a result, this method behaves faster than the traditional SSE2. The actual
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/external/eigen/Eigen/src/Core/arch/SSE/ |
PacketMath.h | 375 // TODO implement SSE2 versions as well as integer versions 405 // SSE2 versions 567 // SSE2 versions
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/external/llvm/lib/Target/X86/ |
X86CallingConv.td | 82 // SSE2. 344 // is not a vararg call and if SSE2 is available, are passed in SSE registers. 443 // call and if SSE2 is available, are passed in SSE registers.
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/external/mesa3d/src/gallium/auxiliary/gallivm/ |
lp_bld_pack.c | 406 intrinsic = "llvm.x86.sse2.packssdw.128"; 420 intrinsic = "llvm.x86.sse2.packsswb.128"; 423 intrinsic = "llvm.x86.sse2.packuswb.128";
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/external/skia/src/opts/ |
SkBitmapProcState_opts_SSSE3.cpp | 371 // - Use of 2 special SSSE3 instructions (comparatively to the SSE2 instruction 378 // as one can see in the SSE2 implementation, all inputs have to be used as 382 // As a result, this method behaves faster than the traditional SSE2. The actual
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/system/core/libcutils/arch-x86/ |
sse2-memset16-atom.S | 130 .section .text.sse2,"ax",@progbits 156 .pushsection .rodata.sse2,"a",@progbits 482 .pushsection .rodata.sse2,"a",@progbits
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/external/chromium_org/v8/src/ia32/ |
assembler-ia32.h | 521 // if (assembler->IsSupported(SSE2)) { 522 // CpuFeatureScope fscope(assembler, SSE2); 523 // // Generate SSE2 floating point code. 536 if (f == SSE2 && !FLAG_enable_sse2) return false; 994 // SSE2 instructions [all...] |
/external/v8/src/ia32/ |
assembler-ia32.h | 447 // if (CpuFeatures::IsSupported(SSE2)) { 448 // CpuFeatures::Scope fscope(SSE2); 449 // // Generate SSE2 floating point code. 462 if (f == SSE2 && !FLAG_enable_sse2) return false; 975 // SSE2 instructions [all...] |
stub-cache-ia32.cc | [all...] |
/external/libvpx/libvpx/vp8/encoder/ |
rdopt.c | 478 unsigned int sse2 = 0; local 504 mv_col & 7, mv_row & 7, upred_ptr, uv_stride, &sse2); 507 sse2 += sse1; 512 upred_ptr, uv_stride, &sse2); 515 sse2 += sse1; 517 return sse2; 1798 unsigned int sse2 = VP8_UVSSE(x); local [all...] |
pickinter.c | 473 unsigned int sse2 = 0; local 475 sse2 = VP8_UVSSE(x); 477 if (sse2 * 2 < x->encode_breakout) [all...] |
/external/v8/src/x64/ |
assembler-x64.h | 445 // // Generate standard x87 or SSE2 floating point code. 456 if (f == SSE2 && !FLAG_enable_sse2) return false; 514 // Safe defaults include SSE2 and CMOV for X64. It is always available, if 517 // fpu, tsc, cx8, cmov, mmx, sse, sse2, fxsr, syscall 518 static const uint64_t kDefaultCpuFeatures = (1 << SSE2 | 1 << CMOV); [all...] |
/bionic/libc/arch-x86/string/ |
sse2-memset-atom.S | 146 .section .text.sse2,"ax",@progbits 170 .pushsection .rodata.sse2,"a",@progbits 452 .pushsection .rodata.sse2,"a",@progbits
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/external/llvm/docs/ |
TestingGuide.rst | 317 ; RUN: llc -mcpu=core2 < %s | FileCheck %s -check-prefix=SSE2 325 ; SSE2: @test1 326 ; SSE2: psubusw LCPI0_0(%rip), %xmm0
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/external/chromium_org/third_party/mesa/src/src/gallium/drivers/llvmpipe/ |
lp_screen.c | 450 /* require SSE2 due to LLVM PR6960. */
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/external/chromium_org/third_party/mesa/src/src/mesa/x86/rtasm/ |
x86sse.h | 9 * for mmx/sse/sse2 support on the cpu.
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