| /external/llvm/include/llvm/MC/ |
| MCSubtargetInfo.h | 46 uint64_t FeatureBits; // Feature bits for current CPU + FS
49 void InitMCSubtargetInfo(StringRef TT, StringRef CPU, StringRef FS,
71 /// InitMCProcessorInfo - Set or change the CPU (optionally supplemented with
73 void InitMCProcessorInfo(StringRef CPU, StringRef FS);
83 /// getSchedModelForCPU - Get the machine model of a CPU.
85 const MCSchedModel *getSchedModelForCPU(StringRef CPU) const;
87 /// getSchedModel - Get the machine model for this subtarget's CPU.
129 /// getInstrItineraryForCPU - Get scheduling itinerary of a CPU.
131 InstrItineraryData getInstrItineraryForCPU(StringRef CPU) const;
|
| /external/llvm/lib/Target/AArch64/ |
| AArch64TargetMachine.cpp | 30 StringRef CPU, StringRef FS,
34 : LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL),
35 Subtarget(TT, CPU, FS),
|
| /external/llvm/lib/Target/Hexagon/ |
| HexagonSubtarget.cpp | 49 HexagonSubtarget::HexagonSubtarget(StringRef TT, StringRef CPU, StringRef FS):
50 HexagonGenSubtargetInfo(TT, CPU, FS),
51 CPUString(CPU.str()) {
72 // Initialize scheduling itinerary for the specified CPU.
|
| /external/llvm/lib/Target/NVPTX/ |
| NVPTXTargetMachine.h | 50 NVPTXTargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS,
101 NVPTXTargetMachine32(const Target &T, StringRef TT, StringRef CPU,
110 NVPTXTargetMachine64(const Target &T, StringRef TT, StringRef CPU,
|
| /external/llvm/lib/Target/PowerPC/ |
| PPCTargetMachine.h | 42 StringRef CPU, StringRef FS, const TargetOptions &Options,
82 StringRef CPU, StringRef FS, const TargetOptions &Options,
93 StringRef CPU, StringRef FS, const TargetOptions &Options,
|
| PPCTargetMachine.cpp | 37 StringRef CPU, StringRef FS,
42 : LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL),
43 Subtarget(TT, CPU, FS, is64Bit),
58 StringRef CPU, StringRef FS,
62 : PPCTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, false) {
68 StringRef CPU, StringRef FS,
72 : PPCTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, true) {
|
| /external/llvm/lib/Target/Sparc/ |
| SparcTargetMachine.h | 37 StringRef CPU, StringRef FS, const TargetOptions &Options,
67 StringRef CPU, StringRef FS,
79 StringRef CPU, StringRef FS,
|
| /external/llvm/lib/Target/SystemZ/ |
| SystemZTargetMachine.cpp | 22 StringRef CPU, StringRef FS,
27 : LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL),
28 Subtarget(TT, CPU, FS),
|
| /external/lzma/CPP/ |
| Build.mak | 3 !IFDEF CPU
11 !IFDEF CPU
12 O=$(CPU)
18 !IF "$(CPU)" == "AMD64"
20 !ELSEIF "$(CPU)" == "ARM"
40 !IF "$(CPU)" == "ARM"
|
| /external/chromium_org/base/ |
| cpu.cc | 5 #include "base/cpu.h"
21 CPU::CPU()
88 void CPU::Initialize() {
94 // valid Ids in CPUInfo[0] and the CPU identification string in
95 // the other three array elements. The CPU identification string is
106 // Interpret CPU feature information.
126 // Get the brand string of the cpu.
151 CPU::IntelMicroArchitecture CPU::GetIntelMicroArchitecture() const
[all...] |
| /external/chromium_org/third_party/WebKit/Source/wtf/text/ |
| ASCIIFastPath.h | 26 #include "wtf/CPU.h"
31 #if OS(DARWIN) && (CPU(X86) || CPU(X86_64))
87 // Compare the values of CPU word size.
107 #if OS(DARWIN) && (CPU(X86) || CPU(X86_64))
137 #elif COMPILER(GCC) && CPU(ARM_NEON) && !(CPU(BIG_ENDIAN) || CPU(MIDDLE_ENDIAN)) && defined(NDEBUG)
|
| /external/llvm/lib/Target/X86/ |
| X86TargetMachine.cpp | 34 StringRef CPU, StringRef FS,
38 : X86TargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, false),
58 StringRef CPU, StringRef FS,
62 : X86TargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, true),
79 StringRef CPU, StringRef FS,
84 : LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL),
85 Subtarget(TT, CPU, FS, Options.StackAlignmentOverride, is64Bit),
|
| X86TargetMachine.h | 39 StringRef CPU, StringRef FS, const TargetOptions &Options,
88 StringRef CPU, StringRef FS, const TargetOptions &Options,
117 StringRef CPU, StringRef FS, const TargetOptions &Options,
|
| /external/llvm/lib/Target/Mips/MCTargetDesc/ |
| MipsMCTargetDesc.cpp | 38 static std::string ParseMipsTriple(StringRef TT, StringRef CPU) {
55 if (CPU.empty() || CPU == "mips32") {
57 } else if (CPU == "mips32r2") {
61 if (CPU.empty() || CPU == "mips64") {
63 } else if (CPU == "mips64r2") {
82 static MCSubtargetInfo *createMipsMCSubtargetInfo(StringRef TT, StringRef CPU,
84 std::string ArchFS = ParseMipsTriple(TT,CPU);
92 InitMipsMCSubtargetInfo(X, TT, CPU, ArchFS)
[all...] |
| /external/qemu/android/build/ |
| common.sh | 59 ## Normalize OS and CPU
62 CPU=`uname -m`
63 case "$CPU" in
64 i?86) CPU=x86
66 amd64) CPU=x86_64
68 powerpc) CPU=ppc
72 log2 "CPU=$CPU"
74 # at this point, the supported values for CPU are:
86 OS=darwin-$CPU
[all...] |
| /external/chromium/base/ |
| cpu.cc | 5 #include "base/cpu.h"
17 CPU::CPU()
82 void CPU::Initialize() {
88 // valid Ids in CPUInfo[0] and the CPU identification string in
89 // the other three array elements. The CPU identification string is
102 // Interpret CPU feature information.
|
| /external/llvm/lib/Target/ARM/ |
| ARMTargetMachine.h | 42 StringRef CPU, StringRef FS,
77 StringRef CPU, StringRef FS,
115 StringRef CPU, StringRef FS,
|
| /external/llvm/lib/Target/Mips/ |
| MipsTargetMachine.h | 52 StringRef CPU, StringRef FS, const TargetOptions &Options,
107 StringRef CPU, StringRef FS, const TargetOptions &Options,
118 StringRef CPU, StringRef FS, const TargetOptions &Options,
|
| /external/llvm/lib/Target/X86/MCTargetDesc/ |
| X86MCTargetDesc.h | 73 MCSubtargetInfo *createX86MCSubtargetInfo(StringRef TT, StringRef CPU,
82 MCAsmBackend *createX86_32AsmBackend(const Target &T, StringRef TT, StringRef CPU);
83 MCAsmBackend *createX86_64AsmBackend(const Target &T, StringRef TT, StringRef CPU);
|
| /external/blktrace/ |
| barrier.h | 30 #error Define store_barrier() for your CPU
|
| /external/chromium_org/native_client_sdk/src/libraries/third_party/pthreads-win32/ |
| context.h | 71 #error Module contains CPU-specific code; modify and recompile.
|
| /external/llvm/lib/Target/PowerPC/MCTargetDesc/ |
| PPCMCTargetDesc.h | 43 MCAsmBackend *createPPCAsmBackend(const Target &T, StringRef TT, StringRef CPU);
|
| /external/llvm/lib/Target/R600/MCTargetDesc/ |
| AMDGPUMCTargetDesc.h | 44 StringRef CPU);
|
| /external/llvm/lib/Target/SystemZ/MCTargetDesc/ |
| SystemZMCTargetDesc.h | 58 StringRef CPU);
|
| /external/chromium_org/third_party/WebKit/Source/wtf/dtoa/ |
| utils.h | 32 #include "wtf/CPU.h"
53 #elif CPU(MIPS) || CPU(PPC) || CPU(PPC64) || CPU(SH4) || CPU(S390) || CPU(S390X) || CPU(IA64) || CPU(SPARC) || CPU(ALPHA
[all...] |
