1 //===-- SystemZTargetMachine.cpp - Define TargetMachine for SystemZ -------===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 10 #include "SystemZTargetMachine.h" 11 #include "llvm/CodeGen/Passes.h" 12 #include "llvm/Support/TargetRegistry.h" 13 14 using namespace llvm; 15 16 extern "C" void LLVMInitializeSystemZTarget() { 17 // Register the target. 18 RegisterTargetMachine<SystemZTargetMachine> X(TheSystemZTarget); 19 } 20 21 SystemZTargetMachine::SystemZTargetMachine(const Target &T, StringRef TT, 22 StringRef CPU, StringRef FS, 23 const TargetOptions &Options, 24 Reloc::Model RM, 25 CodeModel::Model CM, 26 CodeGenOpt::Level OL) 27 : LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL), 28 Subtarget(TT, CPU, FS), 29 // Make sure that global data has at least 16 bits of alignment by default, 30 // so that we can refer to it using LARL. We don't have any special 31 // requirements for stack variables though. 32 DL("E-p:64:64:64-i1:8:16-i8:8:16-i16:16-i32:32-i64:64" 33 "-f32:32-f64:64-f128:64-a0:8:16-n32:64"), 34 InstrInfo(*this), TLInfo(*this), TSInfo(*this), 35 FrameLowering(*this, Subtarget) { 36 initAsmInfo(); 37 } 38 39 namespace { 40 /// SystemZ Code Generator Pass Configuration Options. 41 class SystemZPassConfig : public TargetPassConfig { 42 public: 43 SystemZPassConfig(SystemZTargetMachine *TM, PassManagerBase &PM) 44 : TargetPassConfig(TM, PM) {} 45 46 SystemZTargetMachine &getSystemZTargetMachine() const { 47 return getTM<SystemZTargetMachine>(); 48 } 49 50 virtual bool addInstSelector() LLVM_OVERRIDE; 51 virtual bool addPreSched2() LLVM_OVERRIDE; 52 virtual bool addPreEmitPass() LLVM_OVERRIDE; 53 }; 54 } // end anonymous namespace 55 56 bool SystemZPassConfig::addInstSelector() { 57 addPass(createSystemZISelDag(getSystemZTargetMachine(), getOptLevel())); 58 return false; 59 } 60 61 bool SystemZPassConfig::addPreSched2() { 62 if (getSystemZTargetMachine().getSubtargetImpl()->hasLoadStoreOnCond()) 63 addPass(&IfConverterID); 64 return true; 65 } 66 67 bool SystemZPassConfig::addPreEmitPass() { 68 // We eliminate comparisons here rather than earlier because some 69 // transformations can change the set of available CC values and we 70 // generally want those transformations to have priority. This is 71 // especially true in the commonest case where the result of the comparison 72 // is used by a single in-range branch instruction, since we will then 73 // be able to fuse the compare and the branch instead. 74 // 75 // For example, two-address NILF can sometimes be converted into 76 // three-address RISBLG. NILF produces a CC value that indicates whether 77 // the low word is zero, but RISBLG does not modify CC at all. On the 78 // other hand, 64-bit ANDs like NILL can sometimes be converted to RISBG. 79 // The CC value produced by NILL isn't useful for our purposes, but the 80 // value produced by RISBG can be used for any comparison with zero 81 // (not just equality). So there are some transformations that lose 82 // CC values (while still being worthwhile) and others that happen to make 83 // the CC result more useful than it was originally. 84 // 85 // Another reason is that we only want to use BRANCH ON COUNT in cases 86 // where we know that the count register is not going to be spilled. 87 // 88 // Doing it so late makes it more likely that a register will be reused 89 // between the comparison and the branch, but it isn't clear whether 90 // preventing that would be a win or not. 91 if (getOptLevel() != CodeGenOpt::None) 92 addPass(createSystemZElimComparePass(getSystemZTargetMachine())); 93 addPass(createSystemZLongBranchPass(getSystemZTargetMachine())); 94 return true; 95 } 96 97 TargetPassConfig *SystemZTargetMachine::createPassConfig(PassManagerBase &PM) { 98 return new SystemZPassConfig(this, PM); 99 } 100
