| /external/llvm/lib/Target/PowerPC/ |
| PPCISelDAGToDAG.cpp | 126 if (N.getOpcode() == ISD::TargetConstant ||
127 N.getOpcode() == ISD::TargetGlobalAddress) {
282 if (N->getOpcode() != ISD::Constant)
300 if (N->getOpcode() == ISD::Constant && N->getValueType(0) == MVT::i32) {
310 if (N->getOpcode() == ISD::Constant && N->getValueType(0) == MVT::i64) {
328 return N->getOpcode() == Opc
366 unsigned Opcode = N->getOpcode();
413 unsigned Op0Opc = Op0.getOpcode();
414 unsigned Op1Opc = Op1.getOpcode();
422 if (Op0.getOperand(0).getOpcode() == ISD::SHL |
[all...] |
| /external/llvm/lib/Transforms/Scalar/ |
| Reassociate.cpp | 66 dbgs() << Instruction::getOpcodeName(I->getOpcode()) << " "
206 if (I && (I->getOpcode() == Instruction::Or ||
207 I->getOpcode() == Instruction::And)) {
216 isOr = (I->getOpcode() == Instruction::Or);
238 cast<Instruction>(V)->getOpcode() == Opcode)
244 switch (I->getOpcode()) {
501 unsigned Opcode = I->getOpcode();
616 cast<Instruction>(Op)->getOpcode() != Opcode) &&
689 unsigned Opcode = I->getOpcode();
[all...] |
| /cts/tools/dasm/src/dasm/ |
| DopInfo.java | 137 switch (dop.getOpcode()) {
166 switch (dop.getOpcode()) {
195 switch (dop.getOpcode()) {
208 switch (dop.getOpcode()) {
|
| /dalvik/dx/src/com/android/dx/io/ |
| CodeReader.java | 102 switch (OpcodeInfo.getIndexType(one.getOpcode())) {
|
| /external/clang/lib/StaticAnalyzer/Checkers/ |
| DivZeroChecker.cpp | 50 BinaryOperator::Opcode Op = B->getOpcode();
|
| /external/dexmaker/src/dx/java/com/android/dx/io/ |
| CodeReader.java | 102 switch (OpcodeInfo.getIndexType(one.getOpcode())) {
|
| /external/dexmaker/src/dx/java/com/android/dx/ssa/ |
| SsaInsn.java | 174 abstract public Rop getOpcode();
|
| EscapeAnalysis.java | 219 int op = insn.getOpcode().getOpcode();
255 int prevOpcode = prevSsaInsn.getOpcode().getOpcode();
336 Rop useOpcode = use.getOpcode();
394 int useOpcode = use.getOpcode().getOpcode();
573 switch (use.getOpcode().getOpcode()) {
650 if (insn == null || insn.getOpcode() == null |
[all...] |
| /external/llvm/lib/Target/Mips/ |
| MipsOs16.cpp | 57 switch (Inst.getOpcode()) {
|
| /external/llvm/lib/Target/PowerPC/InstPrinter/ |
| PPCInstPrinter.cpp | 33 if (MI->getOpcode() == PPC::RLWINM) {
56 if ((MI->getOpcode() == PPC::OR || MI->getOpcode() == PPC::OR8) &&
66 if (MI->getOpcode() == PPC::RLDICR) {
|
| /external/llvm/lib/Transforms/Utils/ |
| SimplifyIndVar.cpp | 93 switch (UseInst->getOpcode()) {
115 if (UseInst->getOpcode() == Instruction::LShr) {
244 bool IsSigned = Rem->getOpcode() == Instruction::SRem;
245 if (IsSigned || Rem->getOpcode() == Instruction::URem) {
|
| /external/llvm/lib/Target/R600/ |
| R600ISelLowering.cpp | 113 switch (MI->getOpcode()) {
152 TII->get(MI->getOpcode()),
183 unsigned EOP = (llvm::next(I)->getOpcode() == AMDGPU::RETURN) ? 1 : 0;
185 BuildMI(*BB, I, BB->findDebugLoc(I), TII->get(MI->getOpcode()))
436 if (NextExportInst->getOpcode() == AMDGPU::EG_ExportSwz ||
437 NextExportInst->getOpcode() == AMDGPU::R600_ExportSwz) {
446 bool EOP = (llvm::next(I)->getOpcode() == AMDGPU::RETURN)? 1 : 0;
449 unsigned CfInst = (MI->getOpcode() == AMDGPU::EG_ExportSwz)? 84 : 40;
450 BuildMI(*BB, I, BB->findDebugLoc(I), TII->get(MI->getOpcode()))
484 switch (Op.getOpcode()) {
[all...] |
| /dalvik/dexgen/src/com/android/dexgen/rop/code/ |
| Insn.java | 126 public final Rop getOpcode() {
159 if (opcode.getOpcode() == RegOps.MARK_LOCAL) {
189 * is just a convenient wrapper for {@code getOpcode().canThrow()}.
281 return opcode == b.getOpcode()
|
| /dalvik/dx/src/com/android/dx/ssa/ |
| EscapeAnalysis.java | 218 int op = insn.getOpcode().getOpcode();
254 int prevOpcode = prevSsaInsn.getOpcode().getOpcode();
335 Rop useOpcode = use.getOpcode();
393 int useOpcode = use.getOpcode().getOpcode();
572 switch (use.getOpcode().getOpcode()) {
649 if (insn == null || insn.getOpcode() == null |
[all...] |
| /external/clang/lib/ARCMigrate/ |
| TransZeroOutPropsInDealloc.cpp | 164 if (BOE->getOpcode() == BO_Comma)
168 if (BOE->getOpcode() != BO_Assign)
198 if (BO->getOpcode() != BO_Assign) return false;
|
| /external/llvm/lib/Target/ARM/MCTargetDesc/ |
| ARMMCTargetDesc.cpp | 237 if (Inst.getOpcode() == ARM::Bcc && Inst.getOperand(1).getImm()==ARMCC::AL)
244 if (Inst.getOpcode() == ARM::Bcc && Inst.getOperand(1).getImm()==ARMCC::AL)
252 if (Info->get(Inst.getOpcode()).OpInfo[0].OperandType!=MCOI::OPERAND_PCREL)
|
| /external/llvm/lib/Target/Hexagon/ |
| HexagonAsmPrinter.cpp | 209 if (MInst->getOpcode() == TargetOpcode::DBG_VALUE ||
210 MInst->getOpcode() == TargetOpcode::IMPLICIT_DEF) {
232 if (MI->getOpcode() == Hexagon::ENDLOOP0) {
|
| /external/llvm/lib/Target/Mips/InstPrinter/ |
| MipsInstPrinter.cpp | 79 switch (MI->getOpcode()) {
93 switch (MI->getOpcode()) {
231 switch (MI.getOpcode()) {
|
| /external/llvm/lib/Target/X86/ |
| X86FixupLEAs.cpp | 99 switch (MI->getOpcode()) {
105 TII->get( MI->getOpcode() == X86::MOV32rr ? X86::LEA32r : X86::LEA64r))
212 int opcode = MI->getOpcode();
|
| X86MCInstLower.cpp | 262 switch (Inst.getOpcode()) {
337 OutMI.setOpcode(MI->getOpcode());
380 switch (OutMI.getOpcode()) {
414 switch (OutMI.getOpcode()) {
438 switch (OutMI.getOpcode()) {
454 unsigned Opcode = OutMI.getOpcode();
474 switch (OutMI.getOpcode()) {
613 bool is64Bits = MI.getOpcode() == X86::TLS_addr64 ||
614 MI.getOpcode() == X86::TLS_base_addr64;
616 bool needsPadding = MI.getOpcode() == X86::TLS_addr64
[all...] |
| X86ISelLowering.cpp | 73 if (Vec.getOpcode() == ISD::UNDEF)
85 if (Vec.getOpcode() == ISD::BUILD_VECTOR)
122 if (Vec.getOpcode() == ISD::UNDEF)
[all...] |
| /external/llvm/lib/Transforms/InstCombine/ |
| InstCombineMulDivRem.cpp | 56 if (I->getOpcode() == Instruction::LShr && !I->isExact()) {
61 if (I->getOpcode() == Instruction::Shl && !I->hasNoUnsignedWrap()) {
216 (BO->getOpcode() != Instruction::UDiv &&
217 BO->getOpcode() != Instruction::SDiv)) {
224 (BO->getOpcode() == Instruction::UDiv ||
225 BO->getOpcode() == Instruction::SDiv)) {
237 if (BO->getOpcode() == Instruction::UDiv)
313 if (I->getOpcode() != Instruction::FMul || !I->hasUnsafeAlgebra())
331 if (!I || (I->getOpcode() != Instruction::FMul &&
332 I->getOpcode() != Instruction::FDiv)
[all...] |
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| LegalizeIntegerTypes.cpp | 43 switch (N->getOpcode()) {
169 SDValue Res = DAG.getAtomic(N->getOpcode(), SDLoc(N),
182 SDValue Res = DAG.getAtomic(N->getOpcode(), SDLoc(N),
196 SDValue Res = DAG.getAtomic(N->getOpcode(), SDLoc(N),
315 Op = DAG.getNode(N->getOpcode(), dl, NVT, Op);
333 if (N->getOpcode() == ISD::CTTZ) {
341 return DAG.getNode(N->getOpcode(), dl, NVT, Op);
353 unsigned NewOpc = N->getOpcode();
360 if (N->getOpcode() == ISD::FP_TO_UINT &&
370 return DAG.getNode(N->getOpcode() == ISD::FP_TO_UINT
[all...] |
| /external/dexmaker/src/dx/java/com/android/dx/dex/code/ |
| OutputFinisher.java | 379 result[i] = insns.get(i).getOpcode();
524 Dop result = findOpcodeForInsn(insn.getLowRegVersion(), insn.getOpcode());
566 Dop originalOpcode = insn.getOpcode();
599 Dop originalOpcode = insn.getOpcode();
689 Dop opcode = insn.getOpcode();
|
| /external/llvm/lib/Target/ARM/ |
| MLxExpansionPass.cpp | 190 unsigned Opcode = MCID.getOpcode();
220 if (TII->isFpMLxInstruction(DefMI->getOpcode())) {
237 return isFpMulInstruction(DefMI->getOpcode()) || hasLoopHazard(MI);
255 if (TII->canCauseFpMLxStall(NextMI->getOpcode())) {
361 if (!TII->isFpMLxInstruction(MCID.getOpcode(),
|
